Register Descriptions - Hitachi H8/3062 Hardware Manual

Single-chip microcomputer
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7.6.2

Register Descriptions

Table 7.8 summarizes the registers of port 5.
Table 7.8
Port 5 Registers
Address* Name
H'EE004 Port 5 data direction register
H'FFFD4 Port 5 data register
H'EE03F Port 5 input pull-up MOS control
register
Note: * Lower 20 bits of the address in advanced mode.
Port 5 Data Direction Register (P5DDR): P5DDR is an 8-bit write-only register that can select
input or output for each pin in port 5.
Bits 7 to 4 are reserved. They are fixed at 1, and cannot be modified.
Bit
Initial value
Modes
1 to 4
Read/Write
Initial value
Modes
5 to 7
Read/Write
• Modes 1 to 4 (Expanded Modes with On-Chip ROM Disabled)
P5DDR values are fixed at 1. Port 5 functions as an address bus output.
• Mode 5 (Expanded Modes with On-Chip ROM Enabled)
Following a reset, port 5 is an input port. A pin in port 5 becomes an address output pin if the
corresponding P5DDR bit is set to 1, and an input port if this bit is cleared to 0.
• Modes 6 and 7 (Single-Chip Mode)
Port 5 functions as an input/output port. A pin in port 5 becomes an output port if the
corresponding P5DDR bit is set to 1, and an input port if this bit is cleared to 0.
In modes 1 to 4, P5DDR bits are always read as 1, and cannot be modified.
178
7
6
1
1
1
1
Reserved bits
Abbreviation R/W
P5DDR
P5DR
P5PCR
5
4
P5 DDR
3
1
1
1
1
Initial Value
Modes 1 to 4 Modes 5 to 7
W
H'FF
R/W
H'F0
R/W
H'F0
3
2
P5 DDR
P5 DDR
2
1
1
0
0
W
W
Port 5 data direction 3 to 0
These bits select input or
output for port 5 pins
H'F0
H'F0
H'F0
1
0
P5 DDR
1
0
1
1
0
0
W
W

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