Hitachi H8/3062 Hardware Manual page 812

Single-chip microcomputer
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Data
Address
Register
Bus
(Low)
Name
Width Bit 7
H'FFFB0 SMR
8
H'FFFB1 BRR
8
H'FFFB2 SCR
8
H'FFFB3 TDR
8
H'FFFB4 SSR
8
H'FFFB5 RDR
8
H'FFFB6 SCMR
8
H'FFFB7 Reserved area (access prohibited)
H'FFFB8 SMR
8
H'FFFB9 BRR
8
H'FFFBA SCR
8
H'FFFBB TDR
8
H'FFFBC SSR
8
H'FFFBD RDR
8
H'FFFBE SCMR
8
H'FFFBF Reserved area (access prohibited)
H'FFFC0 Reserved area (access prohibited)
H'FFFC1
H'FFFC2
H'FFFC3
H'FFFC4
H'FFFC5
H'FFFC6
H'FFFC7
H'FFFC8 —
H'FFFC9 —
H'FFFCA —
H'FFFCB —
H'FFFCC —
H'FFFCD —
H'FFFCE —
H'FFFCF —
H'FFFD0 P1DR
8
H'FFFD1 P2DR
8
H'FFFD2 P3DR
8
Bit 6
Bit 5
C/A
CHR
PE
TIE
RIE
TE
TDRE
RDRF
ORER
C/A
CHR
PE
TIE
RIE
TE
TDRE
RDRF
ORER
P1
P1
P1
7
6
5
P2
P2
P2
7
6
5
P3
P3
P3
7
6
5
Bit Names
Bit 4
Bit 3
Bit 2
O/E
STOP
MP
RE
MPIE
TEIE
FER/
PER
TEND
ERS
SDIR
SINV
O/E
STOP
MP
RE
MPIE
TEIE
FER/
PER
TEND
ERS
SDIR
SINV
P1
P1
P1
4
3
2
P2
P2
P2
4
3
2
P3
P3
P3
4
3
2
Bit 1
Bit 0
Module Name
CKS1
CKS0
SCI channel 0
CKE1
CKE0
MPB
MPBT
SMIF
CKS1
CKS0
SCI channel 1
CKE1
CKE0
MPB
MPBT
SMIF
P1
P1
Port 1
1
0
P2
P2
Port 2
1
0
P3
P3
Port 3
1
0
797

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