Hitachi H8/3062 Hardware Manual page 738

Table 22.37 Timing of On-Chip Supporting Modules
Condition: T = –20°C to +75°C
a
Condition A: V = 3.0 to 3.6 V, AV
CC
fmax = TBD
Condition B: V = 5.0 V ± 10%, AV
CC
fmax = 20 MHz
Condition C: V = 5.0 V ± 10%, AV
CC
fmax = 25 MHz
Module Item
Ports Output data
and delay time
TPC
Input data setup
time
Input data hold
time
16-bit Timer output
timer delay time
Timer input
setup time
Timer clock
input setup time
Timer Single
clock edge
pulse
Both
width
edges
8-bit Timer output
timer delay time
Timer input
setup time
Timer clock
input setup time
Timer Single
clock edge
pulse
Both
width
edges
= 3.0 to 3.6 V, V
CC
= 5.0 V ± 10%, V
CC
= 5.0 V ± 10%, V
CC
A
Symbol Min Max
t — 100
PWD
t 50 —
PRS
t 50 —
PRH
t — 100
TOCD
t 50 —
TICS
t 50 —
TCKS
t 1.5 —
TCKWH
t 2.5 —
TCKWL
t — 100
TOCD
t 50 —
TICS
t 50 —
TCKS
t 1.5 —
TCKWH
t 2.5 —
TCKWL
= 3.0 to AV
REF
= 4.5 to AV
REF
= 4.5 to AV
REF
Condition
B and C
Min Max
— 50
50 —
50 —
— 50
50 —
50 —
1.5 —
2.5 —
— 50
50 —
50 —
1.5 —
2.5 —
— Preliminary —
, V = AV = 0 V,
CC SS SS
, V = AV = 0 V,
CC SS SS
, V = AV = 0 V,
CC SS SS
Test
Unit Conditions
ns Figure 22.21
ns
ns
ns Figure 22.22
ns
ns Figure 22.23
t
cyc
t
cyc
ns Figure 22.22
ns
ns Figure 22.23
t
cyc
t
cyc
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