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D.1
Port States in Each Mode
Table D.1
Port States
Pin
Name
Mode
RESO*
1
—
P1
to P1
1 to 4
7
0
5
6, 7
P2
to P2
1 to 4
7
0
5
6, 7
P3
to P3
1 to 5
7
0
6, 7
P4
to P4
1, 3, 5
7
0
2, 4
6, 7
904
Appendix D Pin States
Hardware
Standby
Software
Reset
Mode
Standby Mode
1
T*
T
T
L
T
(SSOE = 0)
T
(SSOE = 1)
Keep
T
T
(DDR = 0)
T
(
T
(
Keep
T
T
Keep
L
T
(SSOE = 0)
T
(SSOE = 1)
Keep
T
T
(DDR = 0)
Keep
(
T
(
Keep
T
T
Keep
T
T
T
T
T
Keep
T
T
Keep
T
T
T
T
T
Keep
Bus-
Released Mode
T*
T
T
)
DDR=1,SSOE=0
)
DDR=1,SSOE=1
—
T
T
)
DDR=1,SSOE=0
)
DDR=1,SSOE=1
—
T
—
Keep
T
—
Program
Execution Mode
1
1
T*
A
to A
7
(DDR = 0)
Input port
(DDR = 1)
A
to A
7
I/O port
A
15
(DDR = 0)
Input port
(DDR = 1)
A
15
I/O port
D
15
I/O port
I/O port
D
to D
7
I/O port
0
0
to A
8
to A
8
to D
8
0
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