Hitachi H8/3062 Hardware Manual page 694

Table 22.17 Timing of On-Chip Supporting Modules
Condition: T = –20°C to +75°C (regular specifications), T
a
specifications)
Condition A: V = 3.0 to 5.5 V, AV
CC
fmax = 13 MHz
Condition B: V = 5.0 V ± 10%, AV
CC
fmax = 20 MHz
Module Item
Port/ Output data delay time
TPC
Input data setup time
Input data hold time
16-bit Timer output delay
timer time
Timer input setup time t
Timer clock input
setup time
Timer clock
pulse width
8-bit Timer output delay
timer time
Timer input
setup time
Timer clock
input setup time
Timer clock
pulse width
= 3.0 to 5.5 V, V
CC
= 5.0 V ± 10%, V
CC
Symbol
t
PWD
t
PRS
t
PRH
t
TOCD
TICS
t
TCKS
Single t
TCKWH
edge
Both t
TCKWL
edges
t
TOCD
t
TICS
t
TCKS
Single t
TCKWH
edge
Both t
TCKWL
edges
= –40°C to +85°C (wide-range
a
= 3.0 to AV
REF
= 4.5 to AV
REF
Condition
A
Min Max Min
— 100 —
50 — 50
50 — 50
— 100 —
50 — 50
50 — 50
1.5 — 1.5
2.5 — 2.5
— 100 —
50 — 50
50 — 50
1.5 — 1.5
2.5 — 2.5
, V = AV
CC SS SS
, V = AV
CC SS
B
Test
Max Unit Conditions
50 ns Figure 22.21
— ns
— ns
50 ns Figure 22.22
— ns
— ns Figure 22.23
— t
cyc
— t
cyc
50 ns Figure 22.22
— ns
— ns Figure 22.23
— t
cyc
— t
cyc
= 0 V,
= 0 V,
SS
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