Hitachi H8/3062 Hardware Manual page 596

Single-chip microcomputer

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When 1 is written to the RAMS bit, all flash memory blocks are protected from programming and

Bits 2 and 1—RAM2 and RAM1: These bits are used with bit 3 to reassign an area to RAM (see

table 19.6). The initial setting for this bit is 0 in modes 5, 6, and 7 (internal flash memory enabled)

and programming is enabled.* In modes other than 5 to 7, 0 is always read and writing is disabled.

These bits are initialized by a reset and in hardware standby mode. They are not initialized in

software standby mode.

Bit 0—Reserved: This bit cannot be modified and is always read as 1.

Note: * Flash memory emulation by RAM is not supported for mode 6 (single chip normal mode),

so programming is possible, but do not set 1.

When performing flash memory emulation by RAM, the RAME bit in SYSCR must be set

Table 19.6 RAM Area Setting

H'FFF000–H'FFF3FF

H'000000–H'0003FF

H'000400–H'0007FF

H'000800–H'000BFF

H'000C00–H'000FFF

Figure 19.2 Example of ROM Area/RAM Area Overlap

ROM selection

RAM selection

RAM Emulation Status

No emulation

overlap area