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Bit 4—A/D Trigger Enable (ADTE) (In 8TCSR0): In combination with TRGE in the A/D
control register (ADCR), enables or disables A/D converter start requests by compare match A or
an external trigger.
Bit 4
TRGE*
ADTE
0
0
1
1
0
1
Note: * TRGE is bit 7 of the A/D control register (ADCR).
Bit 4—Reserved (In 8TCSR1): This bit is a reserved bit, but can be read and written.
Bit 4—Input Capture Enable (ICE) (In 8TCSR1 and 8TCSR3): Selects the function of
TCORB1 and TCORB3.
Bit 4
ICE
0
1
When bit ICE is set to 1 in 8TCSR1 or 8TCSR3, the operation of the TCORA and TCORB
registers in channels 0 to 3 is as shown in the tables below.
294
Description
A/D converter start requests by compare match A or external trigger pin
(ADTRG) input are disabled
A/D converter start requests by compare match A or external trigger pin
(ADTRG) input are disabled
A/D converter start requests by external trigger pin (ADTRG) input are
enabled, and A/D converter start requests by compare match A are disabled
A/D converter start requests by compare match A are enabled, and A/D
converter start requests by external trigger pin (ADTRG) input are disabled
Description
TCORB1 and TCORB3 are compare match registers
TCORB1 and TCORB3 are input capture registers
(Initial value)
(Initial value)
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