Hitachi H8/3062 Hardware Manual page 384

Single-chip microcomputer

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Notes: 1. When even parity is selected, the parity bit added to transmit data makes an even

number of 1s in the transmitted character and parity bit combined. Receive data must

have an even number of 1s in the received character and parity bit combined.

2. When odd parity is selected, the parity bit added to transmit data makes an odd number

of 1s in the transmitted character and parity bit combined. Receive data must have an

odd number of 1s in the received character and parity bit combined.

Bit 3—Stop Bit Length (STOP): Selects one or two stop bits in asynchronous mode. This setting

is used only in asynchronous mode. In synchronous mod no stop bit is added, so the STOP bit

setting is ignored.

Notes: 1. One stop bit (with value 1) is added to the end of each transmitted character.

2. Two stop bits (with value 1) are added to the end of each transmitted character.

In receiving, only the first stop bit is checked, regardless of the STOP bit setting. If the second

stop bit is 1, it is treated as a stop bit. If the second stop bit is 0, it is treated as the start bit of the

next incoming character.

Bit 2—Multiprocessor Mode (MP): Selects a multiprocessor format. When a multiprocessor

format is selected, parity settings made by the PE and O/E bits are ignored. The MP bit setting is

valid only in asynchronous mode. It is ignored in synchronous mode.

For further information on the multiprocessor communication function, see section 12.3.3,

Multiprocessor Communication.

Bits 1 and 0—Clock Select 1 and 0 (CKS1, CKS0): These bits select the clock source for the on-

chip baud rate generator. Four clock sources can be selected by the CKS1 and CKS0 bits: ø, ø/4,

ø/16, and ø/64.

Even parity*

2 stop bits*

Multiprocessor function disabled

Multiprocessor format selected

(Initial value)