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11.3.2 Interval Timer Operation ...................................................................................... 354
11.3.3 Timing of Setting of Overflow Flag (OVF).......................................................... 354
11.3.4 Timing of Setting of Watchdog Timer Reset Bit (WRST) ................................... 355
11.4 Interrupts ............................................................................................................................ 356
11.5 Usage Notes........................................................................................................................ 356
12.1 Overview ............................................................................................................................ 357
12.1.1 Features ................................................................................................................. 357
12.1.2 Block Diagram ...................................................................................................... 359
12.1.3 Pin Configuration .................................................................................................. 360
12.1.4 Register Configuration .......................................................................................... 361
12.2 Register Descriptions.......................................................................................................... 362
12.2.1 Receive Shift Register (RSR)................................................................................ 362
12.2.2 Receive Data Register (RDR) ............................................................................... 362
12.2.3 Transmit Shift Register (TSR) .............................................................................. 363
12.2.4 Transmit Data Register (TDR).............................................................................. 363
12.2.5 Serial Mode Register (SMR)................................................................................. 364
12.2.6 Serial Control Register (SCR)............................................................................... 367
12.2.7 Serial Status Register (SSR).................................................................................. 371
12.2.8 Bit Rate Register (BRR)........................................................................................ 376
12.3 Operation ............................................................................................................................ 384
12.3.1 Overview ............................................................................................................... 384
12.3.2 Operation in Asynchronous Mode ........................................................................ 387
12.3.3 Multiprocessor Communication............................................................................ 396
12.3.4 Synchronous Operation ......................................................................................... 403
12.4 SCI Interrupts ..................................................................................................................... 411
12.5 Usage Notes........................................................................................................................ 412
12.5.1 Notes on Use of SCI.............................................................................................. 412
13.1 Overview ............................................................................................................................ 417
13.1.1 Features ................................................................................................................. 417
13.1.2 Block Diagram ...................................................................................................... 418
13.1.3 Pin Configuration.................................................................................................. 418
13.1.4 Register Configuration .......................................................................................... 419
13.2 Register Descriptions.......................................................................................................... 420
13.2.1 Smart Card Mode Register (SCMR) ..................................................................... 420
13.2.2 Serial Status Register (SSR).................................................................................. 422
13.2.3 Serial Mode Register (SMR)................................................................................. 423
13.2.4 Serial Control Register (SCR)............................................................................... 424
13.3 Operation ............................................................................................................................ 425
13.3.1 Overview ............................................................................................................... 425
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................................................................. 357
...................................................................................... 417
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