Memory Areas - Hitachi H8/3062 Hardware Manual

Single-chip microcomputer
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6.4.4

Memory Areas

The initial state of each area is basic bus interface, three-state access space. The initial bus width
is selected according to the operating mode.
Area 0: Area 0 includes on-chip ROM, and in ROM-disabled expansion mode, all of area 0 is
external space. In ROM-enabled expansion mode, the space excluding on-chip ROM is external
space.
When area 0 external space is accessed, the CS
signal can be output.
0
The size of area 0 is 128 kbytes in modes 1 and 2, and 2 Mbytes in modes 3 to 5.
Areas 1 to 6: In external expansion mode, areas 1 to 6 are entirely external space.
When area 1 to 6 external space is accessed, the CS
to CS
pin signals respectively can be output.
1
6
The size of areas 1 to 6 is 128 kbytes in modes 1 and 2, and 2 Mbytes in modes 3 to 5.
Area 7: Area 7 includes the on-chip RAM and registers. In external expansion mode, the space
excluding the on-chip RAM and registers is external space. The on-chip RAM is enabled when
the RAME bit in the system control register (SYSCR) is set to 1; when the RAME bit is cleared to
0, the on-chip RAM is disabled and the corresponding space becomes external space .
When area 7 external space is accessed, the CS
signal can be output.
7
The size of area 7 is 128 kbytes in modes 1 and 2, and 2 Mbytes in modes 3 to 5.
144

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