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Program mode
Erase mode
RD VF PR ER FLER = 0
Error
occurrence
Error protection mode
RD VF PR ER FLER = 1
RD: Memory read possible
VF:
Verify-read possible
PR: Programming possible
ER: Erasing possible
(When High Level is Applied to FWE Pin in Mode 5 or 7 (On-Chip ROM Enabled))
The error protection function is invalid for abnormal operations other than the FLER bit setting
conditions. Also, if a certain time has elapsed before this protection state is entered, damage may
already have been caused to the flash memory. Consequently, this function cannot provide
complete protection against damage to flash memory.
To prevent such abnormal operations, therefore, it is necessary to ensure correct operation in
accordance with the program/erase algorithm, with the flash write enable (FWE) voltage applied,
and to conduct constant monitoring for MCU errors, internally and externally, using the watchdog
timer or other means. There may also be cases where the flash memory is in an erroneous
programming or erroneous erasing state at the point of transition to this protection mode, or where
programming or erasing is not properly carried out because of an abort. In cases such as these, a
forced recovery (program rewrite) must be executed using boot mode. However, it may also
happen that boot mode cannot be normally initiated because of overprogramming or overerasing.
RES = 0 or STBY = 0
Error occurrence
(software standby)
Software
standby mode
Software standby
mode release
RD: Memory read not possible
VF:
Verify-read not possible
PR: Programming not possible
ER: Erasing not possible
INIT: Register initialization state
Figure 18.12 Flash Memory State Transitions
Reset or standby
(hardware protection)
RD VF PR ER INIT FLER = 0
RES = 0 or
STBY = 0
RES = 0 or
STBY = 0
Error protection mode
(software standby)
RD VF PR ER INIT FLER = 1
FLMCR1, EBR1, EBR2
initialization state
FLMCR1, FLMCR2,
EBR1, EBR2
initialization state
557
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