Hitachi H8/3062 Hardware Manual page 296

Note on Waveform Period Setting: When a counter is cleared by compare match, the counter is
cleared in the last state at which the 16TCNT value matches the general register value, at the time
when this value would normally be updated to the next count. The actual counter frequency is
therefore given by the following formula:
φ
f =
(N+1)
(f: counter frequency. φ: system clock frequency. N: value set in general register.)
Note on Writes in Synchronized Operation: When channels are synchronized, if a 16TCNT
value is modified by byte write access, all 16 bits of all synchronized counters assume the same
value as the counter that was addressed.
(Example) When channels 1 and 2 are synchronized
• Byte write to channel 1 or byte write to channel 2
16TCNT1 W
16TCNT2 Y
Upper byte Lower byte
• Word write to channel 1 or word write to channel 2
16TCNT1 W
16TCNT2 Y
Upper byte Lower byte
276
Write A to upper byte
of channel 1
X
Z
Write A to lower byte
of channel 2
X
Write AB word to
Z
channel 1 or 2
16TCNT1 A
16TCNT2 A
Upper byte Lower byte
16TCNT1 Y
16TCNT2 Y
Upper byte Lower byte
16TCNT1 A
16TCNT2 A
Upper byte Lower byte
X
X
A
A
B
B