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Preface
The H8/3062 Series is a series of high-performance single-chip microcontrollers that integrate
system supporting functions together with an H8/300H CPU core.
The H8/300H CPU has a 32-bit internal architecture with sixteen 16-bit general registers, and a
concise, optimized instruction set designed for speed. It can address a 16-Mbyte linear address
space.
The on-chip supporting functions include ROM, RAM, 16-bit timers, 8-bit timers, a
programmable timing pattern controller (TPC), a watchdog timer (WDT), a serial communication
interface (SCI), an A/D converter, a D/A converter, I/O ports, and other facilities. The two-
channel SCI supports a smart card interface handling ISO/IEC7816-3 character transmission as an
expansion function. Functions have also been added to reduce power consumption in battery-
powered applications: individual modules can be placed in standby mode, and the frequency of the
system clock supplied to the chip can be divided under program control.
The address space is divided into eight areas. The data bus width and access cycle length can be
selected independently for each area, simplifying the connection of different types of memory.
Seven MCU operating modes (modes 1 to 7) are provided, offering a choice of initial data bus
width and address space size.
With these features, the H8/3062 Series enables easy implementation of compact, high-
performance systems.
In addition to its mask ROM versions, the H8/3062 Series has F-ZTAT™* versions with on-chip
flash memory that allows programs to be rewritten after the chip is mounted on a board. This
version offers flexibility in the development of new products to meet fast-changing market needs.
This manual describes the H8/3062 Series hardware. For details of the instruction set, refer to the
H8/300H Series Programming Manual.
Note: * F-ZTAT™ is a trademark of Hitachi, Ltd.
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