Timer Control/Status Register (Tcsr) - Hitachi H8/3032 Series Hardware Manual

Downloaded from Elcodis.com electronic components distributor

10.2.2 Timer Control/Status Register (TCSR)

TCSR is an 8-bit readable and writable
and clock source.
Bit 7
OVF WT/IT
Initial value 0
*2
Read/Write R/(W) R/W
Timer mode select
Selects the mode
Overflow flag
Status flag indicating overflow
Bits 7 to 5 are initialized to 0 by a reset and in standby mode. Bits 2 to 0 are initialized to 0 by a
reset. In software standby mode bits 2 to 0 are not initialized, but retain their previous values.
Notes: 1. TCSR is write-protected by a password. For details see section 10.2.4, Notes on
Register Access.
2. Only 0 can be written, to clear the flag.
*1
register. Its functions include selecting the timer mode
6 5 4 3
TME — —
0
0 1 1
R/W — —
Reserved bits
Timer enable
Selects whether TCNT runs or halts
299
2 1 0
CKS2 CKS1 CKS0
0 0 0
R/W R/W R/W
Clock select
These bits select the
TCNT clock source