Rules Of Privilege; Privilege Levels; Task Privilege; Selector Privilege (Rpl) - Intel Quark SoC X1000 Core Developer's Manual

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Figure 35.

Four-Level Hierarchical Protection

6.3.2

Rules of Privilege

The Intel
between levels of a task, according to the following rules.
• Data stored in a segment with privilege level p can be accessed only by code
executing at a privilege level at least as privileged as p.
• A code segment/procedure with privilege level p can only be called by a task
executing at the same or a lesser privilege level than p.
6.3.3

Privilege Levels

6.3.3.1

Task Privilege

At any point in time, a task on the Intel
one of the four privilege levels. The current privilege level (CPL) specifies the task's
privilege level. A task's CPL may be changed only by control transfers through gate
descriptors to a code segment with a different privilege level (see
an application program running at PL = 3 may call an operating system routine at PL =
1 (via a gate), which would cause the task's CPL to be set to 1 until the operating
system routine finishes.
6.3.3.2

Selector Privilege (RPL)

The privilege level of a selector is specified by the RPL field. The RPL is the two least
significant bits of the selector. The selector's RPL is used only to establish a less trusted
privilege level than the current privilege level for the use of a segment. This level is
called the task's effective privilege level (EPL). The EPL is defined as the least privileged
(i.e., numerically larger) level of a task's CPL and a selector's RPL. Thus, if selector's
RPL = 0 then the CPL always specifies the privilege level for making an access using the
selector. On the other hand, if RPL = 3, a selector can only access segments at level 3
regardless of the task's CPL. The RPL is most commonly used to verify that pointers
passed to an operating system procedure do not access data that is of higher privilege
than the procedure that originated the pointer. Because the originator of a selector can
specify any RPL value, the Adjust RPL (ARPL) instruction is provided to force the RPL
bits to the originator's CPL.
®
Intel
Quark SoC X1000 Core
Developer's Manual
82
®
Quark SoC X1000 Core controls access to both data and procedures
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Intel
Quark Core—Protected Mode Architecture
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Quark SoC X1000 Core always executes at
Section
6.3.4). Thus,
October 2013
Order Number: 329679-001US

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