C Feature Determination; Cpuid Instruction; Core; Cpuid With Pae/Xd/Smep Features Implemented - Intel Quark SoC X1000 Core Developer's Manual

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Feature Determination—Intel
Appendix C Feature Determination
C.1

CPUID Instruction

CPUID instruction returns processor identification and feature information in the EAX,
EBX, ECX, and EDX registers. The instruction's output values are dependent on the
contents of the EAX register upon execution.
returned depending on the initial value loaded into EAX register.
CPUID returns 0 for leaves greater than 0x02 but less than 0x07 (the highest basic
leaf) as stated in the
or equal to the maximum input value and the leaf is not supported on the processor
then 0 is returned in all registers."
Furthermore, CPUID returns values corresponding to leaf 0x01 for all other EAX values
not listed in the table, as stated in the
CPUID.EAX is higher than the maximum input value for basic or extended function for
that processor then the data for the highest basic information leaf is returned."
Note that zeroes are currently returned for the Processor Brand String (leaf
0x8000002-0x80000004).
Table 102.
CPUID with PAE/XD/SMEP features implemented (Sheet 1 of 2)
EAX value
Register
EAX
0x2
EBX,ECX,EDX
EAX,EBX,
0x3-0x6
ECX,EDX
0x7
& ECX=0
EAX
EBX
ECX,EDX
0x7 & ECX!=0
0X80000000
EAX
EBX,ECX,EDX
0X80000001
EAX,EBX,ECX
EDX
When the value of Limit CPUID Maxval (bit 22 of IA32_MISC_ENABLE) is set to 1, all basic leaves above 3 should be
invisible. In this case, leaf 7 returns all zeros.
October 2013
Order Number: 329679-001US
®
Quark Core
[Intel Arch
SDM]: "If a value entered for CPUID.EAX is less than
Return value
0x00000001
0x0
0x0
0x1
0x80 or 0x0
0x0
0x80000008
0x0
0x0
0x100000
Table 102
summarizes the information
[Intel Arch
SDM]: "If a value entered for
Information provided about the processor
No cache information to report
Maximum number of supported leaf 7 sub-leaves
Bit 7: SMEP (Returns if SMEP is enabled)
EAX=EBX=ECX=EDX=All 0's
Maximum input value for extended function CPUID leaf
Bit 20: execute disable bit available if the
IA32_MISC_ENABLES[34]=0; If IA32_MISC_ENABLES[34]=1
EDX[20]=1'b0
®
Intel
Quark SoC X1000 Core
Developer's Manual
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