Snoop Under Ahold; Various Scenarios Of A Snoop Write-Back Cycle Colliding With An On-Going Cache Fill Or; Replacement Cycle - Intel Quark SoC X1000 Core Developer's Manual

Table 71. Various Scenarios of a Snoop Write-Back Cycle Colliding with an On-Going
Cache Fill or Replacement Cycle
Arbi-
tration
Control
AHOLD
BOFF#
HOLD
10.4.3.2

Snoop under AHOLD

Snooping under AHOLD begins by asserting AHOLD to force the Write-Back Enhanced
®
Intel Quark SoC X1000 Core to float the address bus, as shown in
ADS# for the write-back cycle is guaranteed to occur no sooner than the second clock
following the assertion of HITM# (i.e., there is a dead clock between the assertion of
HITM# and the first ADS# of the snoop write-back cycle).
When a line is written back, KEN#, WB/WT#, BS8#, and BS16# are ignored, and PWT
and PCD are always low during write-back cycles.
®
Intel Quark SoC X1000 Core
Developer's Manual
230
Snoop to a
Snoop to the Line
Different Line than
That Is Being
the Line Being
Filled
Complete fill if the
Read all line fill data cycle is burst. Start
into cache line snoop write-back.
buffer.
If the cycle is non-
Update cache only if burst, the snoop
snoop occurred with write-back is
INV = 0 reordered ahead of
the line fill.
No write-back cycle
because the line has After the snoop write-
not been modified back cycle is
yet. completed, continue
with line fill.
Stop reading line fill
data
Stop fill
Wait for BOFF# to
Wait for BOFF# to be
be deasserted.
deasserted.
Continue read from
Do snoop write-back
backed off point
Continue fill from
Update cache only if
interrupt point.
snoop occurred with
INV = '0'.
HOLD is not acknowledged until the current bus cycle (i.e., the line operation) is completed,
except for a non-cacheable, non-burst code prefetch cycle. Consequently there can be no
collision with the snoop cycles using HOLD, except as mentioned earlier. In this case the snoop
write-back is re-ordered ahead of an on-going non-burst, non-cached code prefetch cycle. After
the write-back cycle is completed, the code prefetch cycle continues from the point of interrupt.
Snoop to the Line
That Is Being
Replaced
Filled
Complete replacement
write-back if the cycle
is burst. Processor
does not initiate a
snoop write-back, but
asserts HITM# until
the replacement write-
back is completed.
If the replacement
cycle is non-burst, the
snoop write-back is
re-ordered ahead of
the replacement write-
back cycle. The
processor does not
continue with the
replacement write-
back cycle.
Stop replacement
write-back
Wait for BOFF# to be
deasserted.
Initiate snoop write-
back
Processor does not
continue replacement
write-back.
®
Intel Quark Core—Bus Operation
Snoop to a Different
Line than the Line
Being Replaced
Complete replacement
write-back if it is a burst
cycle. Initiate snoop
write-back.
If the replacement
write-back is a non-
burst cycle, the snoop
write-back cycle is re-
ordered in front of the
replacement cycle. After
the snoop write-back,
the replacement write-
back is continued from
the interrupt point.
Stop replacement write-
back
Wait for BOFF# to be
de-asserted
Initiate snoop write-
back
Continue replacement
write-back from point of
interrupt.
Figure 113. The
October 2013
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