Global Descriptor Table; Local Descriptor Table; Interrupt Descriptor Table; Descriptor Table Registers - Intel Quark SoC X1000 Core Developer's Manual

Protected Mode Architecture—Intel
Figure 26.

Descriptor Table Registers

6.2.3.2

Global Descriptor Table

The Global Descriptor Table (GDT) contains descriptors that are possibly available to all
of the tasks in a system. The GDT can contain any type of segment descriptor except
for descriptors that are used for servicing interrupts (i.e., interrupt and trap
descriptors). Every Intel
GDT contains code and data segments used by the operating systems and task state
segments, and descriptors for the LDTs in a system.
The first slot of the Global Descriptor Table corresponds to the null selector and is not
used. The null selector defines a null pointer value.
6.2.3.3

Local Descriptor Table

LDTs contain descriptors that are associated with a given task. Generally, operating
systems are designed so that each task has a separate LDT. The LDT may contain only
code, data, stack, task gate, and call gate descriptors. LDTs provide a mechanism for
isolating a given task's code and data segments from the rest of the operating system,
while the GDT contains descriptors for segments that are common to all tasks. A
segment cannot be accessed by a task if its segment descriptor does not exist in either
the current LDT or the GDT. This provides both isolation and protection for a task's
segments, while still allowing global data to be shared among tasks.
Unlike the 6-byte GDT or IDT registers which contain a base address and limit, the
visible portion of the LDT register contains only a 16-bit selector. This selector refers to
a Local Descriptor Table descriptor in the GDT.
6.2.3.4

Interrupt Descriptor Table

The third table needed for Intel
Descriptor Table (see
location of up to 256 interrupt service routines. The IDT may contain only task gates,
interrupt gates, and trap gates. The IDT should be at least 256 bytes in order to hold
the descriptors for the 32 Intel Reserved Interrupts. Every interrupt used by a system
must have an entry in the IDT. The IDT entries are referenced via INT instructions,
external interrupt vectors, and exceptions (see
October 2013
Order Number: 329679-001US
®
Quark Core
®
Quark SoC X1000 Core system contains a GDT. Generally the
®
Quark SoC X1000 Core systems is the Interrupt
Figure 27). The IDT contains the descriptors that point to the
Section 3.7, "Interrupts" on page
®
Intel Quark SoC X1000 Core
33).
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