Encoding Of 16-Bit Address Mode With "Mod R/M" Byte - Intel Quark SoC X1000 Core Developer's Manual

Table 81.

Encoding of 16-Bit Address Mode with "mod r/m" Byte

mod r/m
00 000
00 001
00 010
00 011
00 100
00 101
00 110
00 111
01 000
01 001
01 010
01 011
01 100
01 101
01 110
01 111
Register Specified by r/m during
mod r/m
11 000
11 001
11 010
11 011
11 100
11 101
11 110
11 111
®
Intel Quark SoC X1000 Core
Developer's Manual
258
Effective Address
DS:[BX+SI]
DS:[BX+DI]
SS:[BP+SI]
SS:[BP+DI]
DS:[SI]
DS:[DI]
DS:d16
DS:[BX]
DS:[BX+SI+d8]
DS:[BX+DI+d8]
SS:[BP+SI+d8]
SS:[BP+DI+d8]
DS:[SI+d8]
DS:[DI+d8]
SS:[BP+d8]
DS:[BX+d8]
16-Bit Data Operations
Function of w Field
(when w=0) (when w =1)
AL AX
CL CX
DL DX
BL BX
AH SP
CH BP
DH
BH
®
Intel Quark Core—Instruction Set Summary
mod r/m
10 000
10 001
10 010
10 011
10 100
10 101
10 110
10 111
11 000
11 001
11 010
11 011
11 100
11 101
11 110
11 111
Register Specified by r/m during
32-Bit Data Operations
mod r/m
11 000
11 001
11 010
11 011
11 100
11 101
SI 11 110
DI 11 111
Effective Address
DS:[BX+SI+d16]
DS:[BX+DI+d16]
SS:[BP+SI+d16]
SS:[BP+DI+d16]
DS:[SI+d16]
DS:[DI+d16]
SS:[BP+d16]
DS:[BX+d16]
register–see below
register–see below
register–see below
register–see below
register–see below
register–see below
register–see below
register–see below
Function of w Field
(when w=0) (when w =1)
AL EAX
CL ECX
DL EDX
BL EBX
AH ESP
CH EBP
DH ESI
BH EDI
October 2013
Order Number: 329679-001US