I/O Instructions Clock Count Summary - Intel Quark SoC X1000 Core Developer's Manual

Instruction Set Summary—Intel
Table 92. Notes and Abbreviations (for Table 89 through Table 91) (Sheet 2 of 2)
1. Assuming that the operand address and stack address fall in different cache sets.
2. Always locked, no cache hit case.
3. Clocks= 10 + max(log
4. Clocks
5. Clocks
6. Equal/not equal cases (penalty is the same regardless of lock)
7. Assuming that addresses for memory read (for indirection), stack puch/pop and branch fall in different
cache sets.
8. Penalty for cache miss: add 6 clocks for every 16 bytes copied to new stack frame.
9. Add 11 clocks for each unaccessed descriptor load.
10. Refer to task switch clock counts table for value of TS.
11. Add 4 extra clocks to the cache miss penalty for each 16 bytes.
For notes 12-13:b=0-3, non-zero byte number); (i=0-1, non-zero nibble number); (n=0-3, non-bit number in
nibble);
12. Clocks
13. Clocks
For notes 14-15:(n=bit position 0-31)
14. Clocks
15. Clocks
16. Assuming that the two string addresses fall in different cache sets.
17. Cache miss penalty: add 6 clocks for every 16 bytes compared. Entire penalty on first compare.
18. Cache miss penalty: add 2 clocks for every 16 bytes of data. Entire penalty on first load.
19. Cache miss penalty: add 4 clocks for every 16 bytes moved (1 clock for the first operation and 3 for the
second).
20. Cache miss penalty: add 4 clocks for every 16 bytes scanned (2 clocks each for first and second
operations).
21. Refer to interrupt clock counts table for value of INT.
22. Clock count includes one clock for using both displacement and immediate.
23. Refer to assumption 6 in the case of a cache miss.
24. Virtual Mode Extensions are disabled.
25. Protected Virtual Interrupts are disabled.
Table 93. I/O Instructions Clock Count Summary (Sheet 1 of 2)
Instruction
IN = Input from:
Fixed Port
Variable Port
OUT = Output to:
Fixed Port
Notes:
1. Two clock cache miss penalty in all cases.
2. c = count in CX or ECX.
3. Cache miss penalty in all modes: Add two clocks for every 16 bytes. Entire penalty on second
operation.
October 2013
Order Number: 329679-001US
®
Quark Core
(|m|),n)
2
= {quotient(count/operand length)}*7+9
= 8 if count ≤ operand length (8/16/32)
= {quotient(count/operand length)}*7+9
= 9 if count ≤ operand length (8/16/32)
= 8 + 4 (b+1) + 3(i+1) + 3(n+1)
= 6 if second operand = 0
= 9 + 4 (b+1) + 3(i+1) + 3(n+1)
= 7 if second operand = 0
= 7 + 3(32-n)
= 6 if second operand = 0
= 8 + 3(32-n)
= 7 if second operand = 0
Format
1110 010w : port number
1110 110w
1110 011w : port number
Protected Protected
Real
Mode Mode
Mode
(CPL≤IOPL) (CPL>IOPL)
14 9
14 8
16 11
Intel
Virtual
86 Notes
Mode
29 27
28 27
31 29
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Quark SoC X1000 Core
Developer's Manual
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