Floating-Point Instructions; Instruction Encoding; Overview - Intel Quark SoC X1000 Core Developer's Manual

Instruction Set Summary—Intel
12.1.1

Floating-Point Instructions

In addition to the instructions listed above, the Intel
floating-point instructions and Floating-Point Control instructions. Note that all
Floating-Point Unit instruction mnemonics begin with an F.
12.2

Instruction Encoding

12.2.1

Overview

All instruction encodings are subsets of the general instruction format shown in
Figure 128. Instructions consist of one or two primary opcode bytes, possibly an
address specifier consisting of the "mod r/m" byte and "scaled index" byte, a
displacement if required, and an immediate data field if required.
Within the primary opcode or opcodes, smaller encoding fields may be defined. These
fields vary according to the class of operation. The fields define such information as
direction of the operation, size of the displacements, register encoding, or sign
extension.
Almost all instructions referring to an operand in memory have an addressing mode
byte following the primary opcode byte(s). This byte, the mod r/m byte, specifies the
address mode to be used. Certain encodings of the mod r/m byte indicate a second
addressing byte, the scale-index-base byte, that follows the mod r/m byte to fully
specify the addressing mode.
Addressing modes can include a displacement immediately following the mod r/m byte
or scaled index byte. When a displacement exists, the possible sizes are 8, 16, or 32
bits.
When the instruction specifies an immediate operand, the it follows any displacement
bytes. The immediate operand, when specified, is always the last field of the
instruction.
Figure 128
mod field and the r/m field, but the figure does not show all fields. Several smaller
fields also appear in certain instructions, sometimes within the opcode bytes
themselves.
X1000 Core instruction set. Following
Figure 128. General Instruction Format
October 2013
Order Number: 329679-001US
®
Quark Core
illustrates several of the fields that can appear in an instruction, such as the
Table 75 is a complete list of all fields appearing in the Intel
®
Quark SoC X1000 Core has
Table 75 are detailed tables for each field.
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Quark SoC
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Intel Quark SoC X1000 Core
Developer's Manual
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