Interrupt Handling - Intel Quark SoC X1000 Core Developer's Manual

Note that the I/O instructions (IN, OUT, INS, OUTS, REP INS, and REP OUTS) are not
IOPL-sensitive in Virtual 8086 Mode. Rather, the I/O instructions become automatically
sensitive to the I/O permission bitmap contained in the Intel
Task State Segment. The I/O permission bitmap, automatically used by the Intel
Quark SoC X1000 Core in Virtual 8086 Mode, is illustrated by
The I/O Permission Bitmap can be viewed as a 0–64 Kbit string, which begins in
memory at offset Bit_Map_Offset in the current TSS. Bit_Map_Offset must be ≤ DFFFH
so the entire bit map and the byte FFH that follows the bit map are all at offsets ≤
FFFFH from the TSS base. The 16-bit pointer Bit_Map_Offset (15:0) is found in the
word beginning at offset 66H (102 decimal) from the TSS base, as shown in
Each bit in the I/O permission bitmap corresponds to a single byte-wide I/O port, as
illustrated in
without generating an exception. Otherwise the I/O instruction causes an exception 13
fault. Because every byte-wide I/O port must be protectable, all bits corresponding to a
word-wide or dword-wide port must be 0 for the word-wide or dword-wide I/O to be
permitted. If all the referenced bits are 0, the I/O is allowed. If any referenced bits are
1, the attempted I/O causes an exception 13 fault.
Due to the use of a pointer to the base of the I/O permission bitmap, the bitmap may
be located anywhere within the TSS, or may be ignored completely by pointing the
Bit_Map_Offset (15:0) beyond the limit of the TSS segment. In the same manner, by
adjusting the TSS limit to truncate the bitmap, only a small portion of the 64 Kbyte I/O
space need have an associated map bit. This eliminates the commitment of 8 Kbyte of
memory when a complete bitmap is not required.
Example of Bitmap for I/O Ports 0–255: Setting the TSS limit to {bit_Map_Offset
+ 31 + 1} (see note below) allows a 32-byte bitmap for the I/O ports 0–255, plus a
terminator byte of all ones (see note below). This allows the I/O bitmap to control I/O
permission to I/O port 0–255, but causes an exception 13 fault on attempted I/O to
any I/O port 80256 through 65,565.
Note: Beyond the last byte of I/O mapping information in the I/O permission bitmap, there
must be a byte containing all ones. The byte of all ones must be within the limit of the
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Intel Quark SoC X1000 Core TSS segment (see
6.5.5

Interrupt Handling

Interrupts in Virtual 8086 Mode are handled in a unique way. When running in Virtual
Mode, all interrupts and exceptions involve a privilege change back to the host Intel
Quark SoC X1000 Core operating system. The Intel
system determines if the interrupt comes from a protected mode application or from a
Virtual Mode program by examining the VM bit in the EFLAGS image stored on the
stack.
When a Virtual Mode program is interrupted and execution passes to the interrupt
routine at level 0, the VM bit is cleared. However, the VM bit is still set in the EFLAG
image on the stack.
The Intel
interrupt and then returns control to the program. The Intel
operating system may choose to let the operating system handle the interrupt or it may
emulate the function of the interrupt handler. For example, many operating system
calls are accessed by PUSHing parameters on the stack, and then executing an INT n
instruction. If the IOPL is set to 0, then all INT n instructions are intercepted by the
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Intel Quark SoC X1000 Core operating system. The Intel
operating system could emulate the operating system's call.
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Intel Quark SoC X1000 Core operating system could intercept an operating system's
call to "Open a File."
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Intel Quark SoC X1000 Core
Developer's Manual
110
Figure 36. If a bit is 0, I/O to the corresponding byte-wide port can occur
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Quark SoC X1000 Core operating system in turn handles the exception or
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Intel Quark Core—Protected Mode Architecture
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Quark SoC X1000 Core
Figure 36
Figure 36).
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Quark SoC X1000 Core operating
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Quark SoC X1000 Core
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Quark SoC X1000 Core
Figure 49
Order Number: 329679-001US
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and Figure 37.
Figure 36.
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shows how the
October 2013