Little Endian Vs. Big Endian Data Formats; Interrupts; Interrupts And Exceptions; Big Vs. Little Endian Memory Format - Intel Quark SoC X1000 Core Developer's Manual

Architectural Overview—Intel
3.6.2

Little Endian vs. Big Endian Data Formats

The Intel
architecture, use the "little-endian" method for storing data types that are larger than
one byte. Words are stored in two consecutive bytes in memory with the low-order byte
at the lowest address and the high order byte at the high address. Dwords are stored in
four consecutive bytes in memory with the low-order byte at the lowest address and
the high order byte at the highest address. The address of a word or dword data item is
the byte address of the low-order byte.
Figure 8
dwords. The 32 bits of data are shown with the low order bit numbered bit 0 and the
high order bit numbered 32. Big-endian data is stored with the high-order bits at the
lowest addressed byte. Little-endian data is stored with the high-order bits in the
highest addressed byte.
The Intel
16- or 32-bit data between the two byte orderings:
• BSWAP (byte swap) handles 4-byte values
• XCHG (exchange) handles 2-byte values
Figure 8.

Big vs. Little Endian Memory Format

3.7

Interrupts

3.7.1

Interrupts and Exceptions

Interrupts and exceptions alter the normal program flow, in order to handle external
events, to report errors or exceptional conditions. The difference between interrupts
and exceptions is that interrupts are used to handle asynchronous external events
while exceptions handle instruction faults. Although a program can generate a software
interrupt via an INT N instruction, the Intel
interrupts as exceptions.
Hardware interrupts occur as the result of an external event and are classified into two
types: maskable or non-maskable. Interrupts are serviced after the execution of the
current instruction. After the interrupt handler is finished servicing the interrupt,
execution proceeds with the instruction immediately after the interrupted instruction.
Section 3.7.3
Maskable interrupts.
October 2013
Order Number: 329679-001US
®
Quark Core
®
Quark SoC X1000 Core, as well as all other members of the Intel
illustrates the differences between the big-endian and little-endian formats for
®
Quark SoC X1000 Core has the following two instructions that can convert
m + 3 m + 2
31 24 23
Dword in Little-Endian Memory Format
m m + 1
31 24 23
Dword in Big-Endian Memory Format
and Section 3.7.4
m + 1
16 15 8 7
m + 2 m + 3
16 15 8 7
®
Quark SoC X1000 Core treats software
discuss the differences between Maskable and Non-
m
0
0
A5163-01
®
Intel Quark SoC X1000 Core
Developer's Manual
33