Intel Quark SoC X1000 Core Developer's Manual page 275

Instruction Set Summary—Intel
Table 89. Clock Count Summary (Sheet 9 of 13)
Instruction
STRING INSTRUCTIONS
CMPS = Compare Byte Word
LODS = Load Byte/Word to
AL/AX/EAX
MOVS = Move Byte/Word
SCAS = Scan Byte/Word
STOS = Store Byte/Word
from AL/AX/EX
XLAT = Translate String
REPEATED STRING INSTRUCTIONS
Repeated by Count in CX or ECX (C=Count in CX or ECX)
REPE CMPS = Compare
String
(Find Non-match)
C = 0
C > 0
REPNE CMPS = Compare
String
(Find Match)
C = 0
C > 0
REP LODS = Load String
C = 0
C > 0
REP MOVS = Move String
C = 0
C = 1
C > 1
REPE SCAS = Scan String
(Find Non-AL/AX/EAX)
C = 0
C > 0
REPNE SCAS = Scan String
(Find AL/AX/EAX)
C = 0
C > 0
REP STOS = Store String
C = 0
C > 0
FLAG CONTROL
CLC = Clear Carry Flag
STC = Set Carry Flag
CMC = Complement Carry
Flag
CLD = Clear Direction Flag
Note: See
October 2013
Order Number: 329679-001US
®
Quark Core
1010 011w
1010 111w
1010 010w
1010 111w
1010 101w
1101 0111
1111 0011 : 1010 011w
1111 0010 : 1010 011w
1111 0010 : 1010 110w
1111 0010 : 1010 010w
1111 0011 : 1010 111w
1111 0010 : 1010 111w
1111 0010 : 1010 101w
1111 1000
1111 1001
1111 0101
1111 1100
Table 92 for notes and abbreviations for items in this table.
Cache
Format
12+3c
Penalty
if
Notes
Hit Cache
Miss
8 6 16
5 2
7 2 16
6 2
5
4 2
5
16, 17
7+7c
5
16, 17
7+7c
5
16, 18
7+4c
5
16
13 1
16,19
5
7+5c 20
5
7+5c 20
5
7+4c
2
2
2
2
®
Intel Quark SoC X1000 Core
Developer's Manual
275