Intel Quark SoC X1000 Core Developer's Manual page 268

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Table 89.
Clock Count Summary (Sheet 2 of 13)
Instruction
LEA = Load EA to Register
no index register
with index register
Instruction
ADD = Add
ADC = Add with Carry
AND = Logical AND
OR = Logical OR
SUB = Subtract
SBB = Subtract with Borrow
XOR = Logical Exclusive OR
reg1 to reg2
reg2 to reg1
memory to register
register to memory
immediate to register
immediate to
Accumulator
immediate to memory
Instruction
INC = Increment
DEC = Decrement
reg
or
memory
Instruction
NOT = Logical Complement
NEG = Negate
reg
memory
CMP = Compare
reg1 with reg2
reg2 with reg1
memory with register
register with memory
immediate with register
immediate with acc.
immediate with memory
Note:
See
®
Intel
Quark SoC X1000 Core
Developer's Manual
268
1000 1101 : mod reg r/m
TTT
000
010
100
001
101
011
110
00TT T00w : 11 reg1 reg2
00TT T01w : 11 reg1 reg2
00TT T01w : mod reg r/m
00TT T00w : mod reg r/m
1000 00sw : 11 TTT reg : immediate
register
00TT T10w : immediate data
1000 00sw : mod TTT r/m : immediate
data
TTT
000
001
1111 111w : 11 TTT reg
01TTT reg
1111 111w : mod TTT r/m
TTT
010
011
1111 011w : 11 TTT reg
1111 011w : mod TTT r/m
0011 100w : 11 reg1 reg2
0011 101w : 11 reg1 reg2
0011 100w : mod reg r/m
0011 101w : mod reg r/m
1000 00sw : 11 111 reg : immediate data
0011 110w : immediate data
1000 00sw : mod 111 r/m : immediate
data
Table 92
for notes and abbreviations for items in this table.
®
Intel
Quark Core—Instruction Set Summary
Cache
Format
Penalty
if
Notes
Hit
Cache
Miss
1
2
1
1
2
2
3
6/2
U/L
1
1
3
6/2
U/L
1
1
3
6/2
U/L
1
3
6/2
U/L
1
1
2
2
2
2
1
1
2
2
October 2013
Order Number: 329679-001US

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