Analog Devices ADSP-SC58 Series Hardware Reference Manual page 3025

43 System Protection Unit (SPU)
In a system with multiple system MMR masters, configurations of peripherals can be changed unintentionally lead-
ing to bad data or even system malfunctions. The peripherals are shared resources in the system. The SPU restricts
access to certain MMRs, similar to the functionality of a semaphore.
The SPU also protects peripherals based on security settings. It is part of the overall security infrastructure of the
processor.
SPU Features
The SPU has the following features:
• Write-protect system MMR from certain system masters and core masters.
• Simultaneously lock multiple peripheral configuration registers through a global lock mechanism.
• Write-protect and block access to its own write-protection registers from other system masters.
• Defined security privileges to peripherals and system resources.
• Security protection to guard secure peripheral MMRs against non-secure accesses.
SPU Functional Description
The following sections provide information on the function of the SPU.
ADSP-SC58x SPU Register List
The System Protection Unit (SPU) provides a set of registers that can protect system resources from errant writes.
The protection categories are global lock (protects configuration registers) and write protect register lock (protects
the write protect register). For more information on SPU functionality, see the SPU register descriptions.
Table 43-1: ADSP-SC58x SPU Register List
Name
SPU_CTL
SPU_SECURECHK
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description
Control Register
Secure Check Register
System Protection Unit (SPU)
43–1