Analog Devices ADSP-SC58 Series Hardware Reference Manual page 2892

Descriptor-Based Flow Modes
Table 38-9: Offsets for Descriptor -Array Mode Parameters and Descriptors (Continued)
Descriptor Offset
0x14
All other DMA channel registers not loaded as a result of the descriptor set fetch retain their previous values. The
channel reloads all of the current registers between the descriptor set fetch and the start of the DMA operation for
the work unit.
NOTE: At a minimum, write the
the special action required to start the DMA channel.
Descriptor-List Mode
In this flow mode, multiple descriptors form a chained list in which each descriptor set contains a pointer to the
next descriptor set, allowing greater flexibility in memory layout options. When the channel fetches the descriptor
set, the operation loads this pointer value into the next descriptor pointer register of the DMA channel.
Descriptor Sets
The Offsets for Descriptor-List Mode Parameters and Descriptors table shows how to structure a descriptor set in
memory. Disperse the placement of the descriptor sets throughout memory, having sets reside in different memory
blocks. But, each descriptor of the descriptor set must reside in a contiguous section of memory in the format shown
in the table. The values have the same order as the corresponding offset addresses of the memory-mapped registers.
Table 38-10: Offsets for Descriptor-List Mode Parameters and Descriptors
Descriptor Offset
0x00
0x04
0x08
0x0C
0x10
0x14
0x18
All other DMA channel registers not loaded as a result of the descriptor set fetch retain their previous values. The
channel reloads all of the current values of the registers between the descriptor set fetch and the start of the DMA
operation for the work unit.
Minimum Startup Requirements
At a minimum, write the
action required to start the DMA channel.
38–28
DMA_DSCPTR_CUR
register prior to write to the
DMA_DSCPTR_NXT
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Parameter Register
DMA_YMOD
register prior to writing to the
Parameter Register
DMA_DSCPTR_NXT
DMA_ADDRSTART
DMA_CFG
DMA_XCNT
DMA_XMOD
DMA_YCNT
DMA_YMOD
DMA_CFG
DMA_CFG register, which is
register, which is the special