Transmit User Buffer A0 Register
The
SPDIF_TX_UBUFF_A0
BYTE1 (R/W)
Byte 1 Sub Frame A
BYTE3 (R/W)
Byte 3 of Subframe A User Bit Buffer
Figure 37-27: SPDIF_TX_UBUFF_A0 Register Diagram
Table 37-23: SPDIF_TX_UBUFF_A0 Register Fields
Bit No.
(Access)
31:24
BYTE3
(R/W)
23:16
BYTE2
(R/W)
15:8
BYTE1
(R/W)
7:0
BYTE0
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register holds the transmit user buffer data for bytes 0-3 for sub frame A.
15
14
13
12
11
10
0
0
0
0
0
0
31
30
29
28
27
26
0
0
0
0
0
0
Bit Name
Byte 3 of Subframe A User Bit Buffer.
The SPDIF_TX_UBUFF_A0.BYTE3 bit field contains user bit data for byte 0 of
sub frame A.
Byte 2 Sub Frame A.
The SPDIF_TX_UBUFF_A0.BYTE2 bit field contains user bit data for byte 2 of
sub frame A.
Byte 1 Sub Frame A.
The SPDIF_TX_UBUFF_A0.BYTE1 bit field contains user bit data for byte 1 of
sub frame A.
Byte 0 Sub Frame A.
The SPDIF_TX_UBUFF_A0.BYTE0 bit field contains user bit data for byte 0 of
sub frame A.
9
8
7
6
5
4
3
2
0
0
0
0
0
0
0
0
25
24
23
22
21
20
19
18
0
0
0
0
0
0
0
0
Description/Enumeration
ADSP-SC58x SPDIF Register Descriptions
1
0
0
0
BYTE0 (R/W)
Byte 0 Sub Frame A
17
16
0
0
BYTE2 (R/W)
Byte 2 Sub Frame A
37–39
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