Analog Devices ADSP-SC58 Series Hardware Reference Manual page 3068

Sequence Number Processing
For both outbound and inbound operations, with PKTE_SA_CMD0.HDRPROC enabled and
PKTE_SA_CMD1.ENSQNCHK enabled, the packet engine reads the sequence number from the
PKTE_SA_SEQNUM[n]
mented sequence number in the same SA fields. The sequence number mask
ters in the SA are not used.
For both outbound and inbound operations, with PKTE_SA_CMD0.HDRPROC disabled, the packet engine does
not increment the sequence number. It expects the host to provide the sequence number through the input buffer as
part of the header.
Sequence Number Processing in DTLS
DTLS uses an explicit sequence number of 64 bits that is sent in the packet. The DTLS sequence number is com-
posed of the epoch (16 bits) and packet sequence number (48 bits) that together form the 64-bit number, like the
TLS sequence number. The epoch is incremented after each Change Cipher Spec message. The packet sequence
number is incremented per packet starting from zero after each change cipher spec message.
For outbound operations, with PKTE_SA_CMD0.HDRPROC enabled, the packet engine reads the sequence num-
ber from the PKTE_SA_SEQNUM[n]
packet engine stores the incremented sequence number in the
quence number mask PKTE_SA_SEQNUM_MSK[n]
For outbound operations, with PKTE_SA_CMD0.HDRPROC enabled and PKTE_SA_CMD1.ENSQNCHK ena-
bled, the packet engine generates a sequence number error when the 48-bit sequence number counter overflows
48
(counter is 2 – 1 and increments to 0). The host must not send the packet.
For outbound operations, with PKTE_SA_CMD0.HDRPROC disabled or PKTE_SA_CMD1.ENSQNCHK disa-
bled, the packet engine does not increment and verify a sequence number counter overflow, and therefore never gen-
erates a sequence number error. With PKTE_SA_CMD0.HDRPROC disabled the Packet Engine does not update
the sequence number and sequence number mask fields in the SA and expects the host to provide the sequence
number through the input buffer as part of the header.
For inbound operations, with PKTE_SA_CMD0.HDRPROC enabled and PKTE_SA_CMD1.ENSQNCHK enabled,
the packet engine verifies the
PKTE_SA_SEQNUM_MSK[n]
1. If the received sequence number falls outside and above the 64-bit sequence number mask, the mask is shifted.
The packet engine updates the SA with the received sequence number and the shifted sequence number mask.
2. If the received sequence number falls inside the 64-bit sequence number mask and is not a duplicate sequence
number (the same as received before), the corresponding bit in the mask is set. The packet engine updates the
SA with the received sequence number and the updated sequence number mask.
3. If the received sequence number falls outside the 64-bit sequence number mask or matches and earlier received
number a sequence number error is generated. The packet engine does not update the sequence number and
sequence number mask fields in the SA. The host must discard the packet.
44–20
registers in the SA. When the operation is finished, the packet engine stores the incre-
fields in the SA, then inserts the sequence number in the packet. Then the
PKTE_SA_SEQNUM[n]
from the SA. Three situations can occur:
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
PKTE_SA_SEQNUM_MSK[n]
PKTE_SA_SEQNUM[n]
fields in the SA are not used.
fields against the sequence number in the packet using the
regis-
fields in the SA. The se-