Analog Devices ADSP-SC58 Series Hardware Reference Manual page 2816

Table 37-1: ADSP-SC58x SPDIF Register List (Continued)
Name
SPDIF_TX_USRUPDT
SRU Programming
The SRU (signal routing unit) is used to connect the S/PDIF transmitter biphase data out to the output pins or to
the S/PDIF receiver. The serial clock, frame sync, data, and external sync (if external synchronization is required)
inputs also need to be routed through the SRU. For details of the routing, see the
in the Digital Audio Interface (DAI) chapter.
The SRU needs to be programmed in order to connect the S/PDIF receiver to the output pins or any other periph-
erals and also for the connection to the input biphase stream.
Program the corresponding SRU registers to connect the outputs to the required destinations (see the
Capabilities section). The biphase encoded data and the external PLL clock inputs to the receiver are routed through
the SRU. The extracted clock, frame sync, and data are also routed through the SRU.
S/PDIF Interrupt List
Table 37-2: S/PDIF Interrupt List
Interrupt Name
DAI0_IRQH
DAI1_IRQH
DAI0_IRQL
DAI1_IRQL
Clocking
The module clock of the S/PDIF transceiver is SCLK0_0. The clock source for the S/PDIF receiver reference clock
is CLKO5 from the CDU. When CLKO5 is configured, it supports sampling frequencies of 24 kHz to 192 kHz.
The clock to this module may be shut off for power savings.
Sample rates of 24 kHz to 96 kHz are supported using a 170 MHz to 180 MHz setting on CLKO5.
Sample rates of 32 kHz to 192 kHz are supported using a 225.0 MHz setting on CLKO5.
For information on clock programming, see
S/PDIF Transmitter
The following sections provide information on the S/PDIF transmitter.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Interrupt Condition Return DAI Register
Block Start DAIx_IRPTL
Validity
Non Audio
Locked/Loss of Lock
CDU Programming
Description
User Bit Update Register
Return SEC Register
SEC_ID
Model.
SRU Programming
DAI Routing Capabilities
DAI Routing
SEC ID
24
25
145
146
section
37–3