1MRK 511 424-UEN B
Bay control REC650 2.2 IEC
Technical manual
START (in)
STL1 (in)
STL2 (in)
STL3 (in)
IntToBits
STN (in)
STDIRX
in
b0
START (in)
b1
FW (in)
b2
REV (in)
STL1 (in)
b3
b4
FWL1 (in)
b5
REVL1 (in)
b6
STL2 (in)
FW (in)
b7
FWL2 (in)
b8
REVL2 (in)
b9
STL3 (in)
FWL3 (in)
b10
REVL3 (in)
b11
REV (in)
b12
STN (in)
b13
FWN (in)
b14
REVN (in)
b15
N/A
FWL1 (in)
REVL1 (in)
FWL2 (in)
REVL2 (in)
FWL3 (in)
REVL3 (in)
FWN (in)
REVN (in)
IEC16000162 V2 EN-US
Figure 131:
The START Criteria function
START (in)
IntToBits
STL1 (in)
STL2 (in)
STDIRIN
in
b0
START (in)
STL3 (in)
FW (in)
b1
STN (in)
b2
REV (in)
b3
STL1 (in)
FW (in)
FWL1 (in)
b4
b5
REVL1 (in)
STL2 (in)
b6
b7
FWL2 (in)
b8
REVL2 (in)
STL3 (in)
b9
REV (in)
b10
FWL3 (in)
b11
REVL3 (in)
b12
STN (in)
b13
FWN (in)
b14
REVN (in)
b15
N/A
FWL1 (in)
REVL1 (in)
FWL2 (in)
REVL2 (in)
FWL3 (in)
REVL3 (in)
FWN (in)
REVN (in)
IEC16000163 V2 EN-US
Figure 132:
The DIRECTION Criteria function
START Criteria
≥1
&
≥1
&
≥1
&
&
&
&
&
&
&
&
DIRECTION Criteria
≥1
≥1
&
=1
&
&
=1
&
&
=1
&
&
=1
&
Section 9
Logic
START (out)
BitsToint
STDIROUT
STL1 (out)
START (out)
b0
out
STL2 (out)
FW (out)
b1
STL3 (out)
REV (out)
b2
STN (out)
STL1 (out)
b3
FWL1 (out)
b4
REVL1 (out)
b5
STL2 (out)
b6
FWL2 (out)
b7
FW (out)
REVL2 (out)
b8
STL3 (out)
b9
FWL3 (out)
b10
REVL3 (out)
b11
STN (out)
b12
REV (out)
FWN (out)
b13
REVN (out)
b14
FALSE
b15
FWL1 (out)
REVL1 (out)
FWL2 (out)
REVL2 (out)
FWL3 (out)
REVL3 (out)
FWN (out)
REVN (out)
IEC16000162-2-en.vsdx
START (out)
BitsToint
STL1 (out)
STL2 (out)
START (out)
b0
out
STL3 (out)
FW (out)
b1
STN (out)
REV (out)
b2
STL1 (out)
b3
FWL1 (out)
b4
REVL1 (out)
b5
FW (out)
STL2 (out)
b6
FWL2 (out)
b7
REVL2 (out)
b8
STL3 (out)
b9
FWL3 (out)
b10
REVL3 (out)
b11
REV (out)
STN (out)
b12
FWN (out)
b13
REVN (out)
b14
FALSE
b15
FWL1 (out)
REVL1 (out)
FWL2 (out)
REVL2 (out)
FWL3 (out)
REVL3 (out)
FWN (out)
REVN (out)
IEC16000163-2-en.vsdx
STDIR
285