Spare Packets; Table 50: Spare Packet 0 Configuration Register - Analog Devices ADV8003 Hardware Manual

Packet Map
Address
0xF211
0xF212
0xF213
0xF214
0xF215
0xF216
0xF217
0xF218
0xF219
0xF21A
0xF21B
0xF21C
0xF21D
0xF21E

6.6. SPARE PACKETS

The user may configure the ADV8003 to send any type of packets or InfoFrames via the spare packets controls and associated
configuration registers. The ADV8003 features two such spare packets that can be enabled via the
controls bits. When a spare packet is enabled, the Tx transmits one these enabled spare packets once every two video fields.
spare_pkt0_en, TX1 Main Map, Address 0xEC40[0]
This bit is used to enable the Spare Packet 1.
Function
spare_pkt0_en
0 
1
spare_pkt1_en, TX1 Main Map, Address 0xEC40[1]
This bit is used to enable the Spare Packet 2.
Function
spare_pkt1_en
0 
1
Packet Map
Address
0xF2C0
0xF2C1
0xF202
0xF2C3
0xF2C4
0xF2C5
0xF2C6
0xF2C7
Rev. B, August 2013
Access Type Register Name
R/W spd_pb14[7:0]
R/W spd_pb15[7:0]
R/W spd_pb16[7:0]
R/W spd_pb17[7:0]
R/W spd_pb18[7:0]
R/W spd_pb19[7:0]
R/W spd_pb20[7:0]
R/W spd_pb21[7:0]
R/W spd_pb22[7:0]
R/W spd_pb23[7:0]
R/W spd_pb24[7:0]
R/W spd_pb25[7:0]
R/W spd_pb26[7:0]
R/W spd_pb27[7:0]
Description
Disabled
Enabled
Description
Disabled
Enabled

Table 50: Spare Packet 0 Configuration Register

Access Type Register Name
R/W spare1_hb0[7:0]
R/W spare1_hb1[7:0]
R/W spare1_hb2[7:0]
R/W spare1_pb0[7:0]
R/W spare1_pb1[7:0]
R/W spare1_pb2[7:0]
R/W spare1_pb3[7:0]
R/W spare1_pb4[7:0]
Default Value
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
Default Value
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
250
ADV8003 Hardware Manual
Byte Name
Data Byte 14
Data Byte 15
Data Byte 16
Data Byte 17
Data Byte 18
Data Byte 19
Data Byte 20
Data Byte 21
Data Byte 22
Data Byte 23
Data Byte 24
Data Byte 25
Data Byte 26
Data Byte 27
spare_pkt1_en and spare_pkt0_en
Byte Name
Header Byte 0
Header Byte 1
Header Byte 2
Data Byte 0
Data Byte 1
Data Byte 2
Data Byte 3
Data Byte 4