Spi Slave Interface; Figure 80: Spi Slave Interface Timing And Data Format - Analog Devices ADV8003 Hardware Manual

Video signal processor with motion adaptive deinterlacing, scaling, bitmap osd, dual hdmi tx and video encoder
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Function
spi2_mosi_oe_man
0 
1
spi2_sclk_oe_man, IO Map, Address 0x1ACD[0]
This bit is used to control the output enable for spi2 serial clock.
Function
spi2_sclk_oe_man
0 
1
The SPI interface can be reset using spi_reset.

4.2.8.2. SPI Slave Interface

The ADV8003 SPI slave interface (serial port 1) is used by the MCU to send the OSD data to the DDR2 and to configure the OSD
registers. Note that the SPI functions provided within the ADI libraries will automatically take care of any SPI transfer between the MCU
and ADV8003.
Hence, the information in this section is provided just so the user can configure the MCU SPI master to match the ADV8003 SPI slave
interface, and get both of them to communicate properly. Apart from this setup, the user should not try to access any other SPI register
map (with the exception of the timer SPI registers), since all the OSD SPI communication is handled through the provided ADI firmware.
The SPI slave can support the following modes:
• CPOL = 0, CPHA=0
• CPOL = 0, CPHA=1
• CPOL = 1, CPHA=0
• CPOL = 1, CPHA=1
Figure 80
shows the effect that these settings may have on the data.
CS1
CPOL CPHA
0
0
SCK1
0
1
SCK1
SCK1
1
0
SCK1
1
1
MOSI1
Delay Mode
MISO1
No Delay Mode
MISO1
The CPOL/CPHA can be configured through the I
spi_slave_cpol, IO Map, Address 0x1A14[3]
Rev. B, August 2013
Description
Input
Output
Description
Input
Output
W/R
Device Address
Sub Address
7
6
5
4
3
2 1
0
7
6
5
4

Figure 80: SPI Slave Interface Timing and Data Format

C registers described below.
2
Data in 0
3
2
1 0
7
6
5
4
3
2
1
0
Dummy byte
Data out 0
7
6
5
4
3
2
1
0
223
ADV8003 Hardware Manual
Data in 1
7 6
5
4
3
2
1
0
Data out 0
7 6
5
4
3
2
1
0
Data out 1
7 6
5
4
3
2
1
0

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