Table 34: Output Port Configuration Settings For Example Output Formats - Analog Devices ADV8003 Hardware Manual

Function
svsp_dp_vsynctime[9:0]
0x000 
0xXXX
svsp_dp_vbackporch[9:0], Secondary VSP Map, Address 0xE640[7:0]; Address 0xE641[7:6]
This signal is used to set the vertical back porch duration of output timing. This register's value will be used while
svsp_autocfg_output_vid is 0.
Function
svsp_dp_vbackporch[9:
0]
0x000 
0xXXX
svsp_dp_vpolarity, Secondary VSP Map, Address 0xE642[7]
This signal is used to set the polarity of output VSync. This register's value will be used while svsp_autocfg_output_vid is 0.
Function
svsp_dp_vpolarity
0 
1
svsp_dp_hpolarity, Secondary VSP Map, Address 0xE642[6]
This signal is used to set the polarity of output HSync. This register's value will be used while svsp_autocfg_output_vid is 0.
Function
svsp_dp_hpolarity
0 
1
decount
Output Timing
0xE 0xE
632 633
0x5A 0x00
576i
0x5A 0x00
576p
0xA0 0x00
720p50
0xF0 0x00
1080i50
0xF0 0x00
1080p50
0x50 0x00
vga
0x5A 0x00
480i
0x5A 0x00
480p
0xA0 0x00
720p60
0xF0 0x00
1080i60
0xF0 0x00
1080p60
0xF0 0x00
1080p24
The size of the output images of the VOM scaler can be smaller than that defined by the parameters of the output port. The starting
position for the SVSP output video can be set using
relationship of the VOM scaler image and output video. In this case, the blank area around the output image is filled with color defined by
Rev. B, August 2013
Description
Default
VSync width of output timing
Description
Default
Vertical back porch of output timing
Description
Low
High
Description
Low
High

Table 34: Output Port Configuration Settings for Example Output Formats

hfrontporch HSync
0xE 0xE 0xE 0xE
634 635 636 637
0x03 0x00 0x10 0x00
0x03 0x00 0x10 0x00
0x6E 0x00 0x0A 0x00
0x84 0x00 0x0B 0x00
0x84 0x00 0x0B 0x00
0x04 0x00 0x18 0x00
0x04 0x00 0x0F 0x80
0x04 0x00 0x0F 0x80
0x1B 0x80 0x0A 0x00
0x16 0x00 0x0B 0x00
0x16 0x00 0x0B 0x00
0x9F 0x80 0x0B 0x00
svsp_dp_video_h_start[10:0]
hbackporch activeline
0xE 0xE 0xE 0xE
638 639 63A 63B
0x11 0x00 0x48 0x00
0x11 0x00 0x48 0x00
0x37 0x00 0x5A 0x00
0x25 0x00 0x87 0x00
0x25 0x00 0x87 0x00
0x0C 0x00 0x3C 0x00
0x0F 0x00 0x3C 0x00
0x0F 0x00 0x3C 0x00
0x37 0x00 0x5A 0x00
0x25 0x00 0x87 0x00
0x25 0x00 0x87 0x00
0x25 0x00 0x87 0x00
and svsp_dp_video_v_start[10:0].
199
ADV8003 Hardware Manual
Vfrontporch VSync
0xE 0xE 0xE 0xE
63C 63D 63E 63F
0x01 0x40 0x01 0x40
0x01 0x40 0x01 0x40
0x01 0x40 0x01 0x40
0x01 0x00 0x01 0x40
0x01 0x00 0x01 0x40
0x02 0x80 0x00 0x80
0x02 0x40 0x01 0x80
0x02 0x40 0x01 0x80
0x01 0x40 0x01 0x40
0x01 0x00 0x01 0x40
0x01 0x00 0x01 0x40
0x01 0x00 0x01 0x40
vbackporch vpol hpol
0xE 0xE 0xE6 0xE6
640 641 42[7] 42[6]
0x09 0xC0 0 0
0x09 0xC0 0 0
0x05 0x00 1 1
0x09 0x00 1 1
0x09 0x00 1 1
0x08 0x40 0 0
0x07 0x80 0 0
0x07 0x80 0 0
0x05 0x00 1 1
0x09 0x00 1 1
0x09 0x00 1 1
0x09 0x00 1 1
Figure 66 shows the