Analog Devices ADV8003 Hardware Manual page 5

3.4.3. Gentle Reboot Protocol ...................................................................................................................................................... 205
3.4.4. VOM Set Protocol ............................................................................................................................................................... 206
3.4.5. Free Access Protocol ........................................................................................................................................................... 206
3.5. Progressive to Interlaced Conversion .......................................................................................................................... 207
4. On Screen Display ................................................................................................................................................... 208
4.1. Introduction .................................................................................................................................................................... 208
4.1.1. Features ................................................................................................................................................................................ 208
4.1.2. OSD System Application Diagram ................................................................................................................................... 208
4.1.3. Typical OSD Component Sizes ......................................................................................................................................... 209
4.2. Architecture Overview ................................................................................................................................................... 209
4.2.1. Introduction ........................................................................................................................................................................ 209
4.2.2. Top Level Diagram ............................................................................................................................................................. 209
4.2.3. OSD Blending ...................................................................................................................................................................... 210
4.2.4. External Alpha Blending .................................................................................................................................................... 211
4.2.5. OSD Core ............................................................................................................................................................................. 211
4.2.5.1. OSD Core Region Definition .............................................................................................................................................................. 212
4.2.5.2. OSD Color Space .................................................................................................................................................................................. 213
4.2.6. OSD Timers ......................................................................................................................................................................... 213
4.2.7. OSD Scaler ........................................................................................................................................................................... 217
4.2.8. OSD Master/Slave SPI Interface ....................................................................................................................................... 217
4.2.8.1. Overview ................................................................................................................................................................................................ 218
4.2.8.2. SPI Slave Interface ................................................................................................................................................................................. 223
4.2.8.3. SPI Master Interface ............................................................................................................................................................................. 225
4.2.9. OSD Initialization ............................................................................................................................................................... 226
5. Serial Video Receiver .............................................................................................................................................. 227
5.1. + 5 V Detect ..................................................................................................................................................................... 227
5.2. TMDS Clock Activity Detection................................................................................................................................... 228
5.3. Clock and Data Termination Control .......................................................................................................................... 229
5.4. AV Mute Status ............................................................................................................................................................... 229
5.5. Deep Color Mode Support ............................................................................................................................................ 229
5.6. Video FIFO ...................................................................................................................................................................... 230
5.7. Pixel Repetition ............................................................................................................................................................... 232
5.8. Sync Signal Polarity Readbacks .................................................................................................................................... 233
5.9. InfoFrame Registers ....................................................................................................................................................... 235
5.9.1. InfoFrame Collection Mode .............................................................................................................................................. 235
5.9.2. InfoFrame Checksum Error Flags .................................................................................................................................... 235
5.9.3. AVI InfoFrame Registers ................................................................................................................................................... 236
5.9.4. SPD InfoFrame Registers ................................................................................................................................................... 237
5.9.5. MPEG Source InfoFrame Registers .................................................................................................................................. 238
5.9.6. Vendor Specific InfoFrame Registers ............................................................................................................................... 238
5.10. Packet Registers .............................................................................................................................................................. 239
5.10.1. ISRC Packet Registers ......................................................................................................................................................... 239
5.10.2. Gamut Metadata Packets ................................................................................................................................................... 241
5.11. Customizing Packet/InfoFrame Storage Registers ..................................................................................................... 242
5.12. HDMI Section Reset Strategy ....................................................................................................................................... 244
6. HDMI Transmitter .................................................................................................................................................. 245
Rev. B, August 2013 5
ADV8003 Hardware Manual