Function
rx_reset
0
1
enc_reset, IO Map, Address 0x1AFE[6] (Self-Clearing)
This bit is used to reset the HD and SD encoders.
Function
enc_reset
0
1
tx2_reset, IO Map, Address 0x1AFE[5] (Self-Clearing)
This bit is used to reset the HDMI TX2.
Function
tx2_reset
0
1
tx1_reset, IO Map, Address 0x1AFE[4] (Self-Clearing)
This bit is used to reset the HDMI TX1.
Function
tx1_reset
0
1
dpll_reset, IO Map, Address 0x1AFE[2] (Self-Clearing)
This bit is used to reset the DPLL clock generator.
Function
dpll_reset
0
1
xtal_reset, IO Map, Address 0x1AFE[0] (Self-Clearing)
This bit is used to reset all the clocks in the device and peripheral logic in the core including some CEC logic, the interrupt generator
and the automatic clock selection.
Function
xtal_reset
0
1
main_reset, IO Map, Address 0x1BFF[7] (Self-Clearing)
This bit is used to initiate a global reset for the device.
Rev. B, August 2013
Description
Default
Reset
Description
Default
Reset
Description
Default
Reset
Description
Default
Reset
Description
Default
Reset
Description
Default
Reset
124
ADV8003 Hardware Manual
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