Isrc Packet; Table 67: Acp Packet Configuration Registers - Analog Devices ADV8003 Hardware Manual

Video signal processor with motion adaptive deinterlacing, scaling, bitmap osd, dual hdmi tx and video encoder
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Function
acp_pkt_en
0 
1
Packet Map
Address
0x40
0x41
0x42
0x43
0x44
0x45
0x46
0x47
0x48
0x49
0x4A
0x4B
0x4C
0x4D
0x4E
0x4F
0x50
0x51
0x52
0x53
0x54
0x55
0x56
0x57
0x58
0x59
0x5A
0x5B
0x5C
0x5D
0x5E
1
As defined in the latest CEA 861 specification

6.11.7. ISRC Packet

If the Supports_AI bit in the Vendor Specific Data Block (VSDB) of the sink EDID is set at 1, the International Standard Recording Code
(ISRC) packets 1 and 2 can be transmitted.
The ADV8003 can be configured to transmit ISRC packet by setting
enabled, the ADV8003 transmits an ISRC packet once every two video fields.
used to configure ISRC packets.
Rev. B, August 2013
Description
Disabled
Enabled

Table 67: ACP Packet Configuration Registers

Access Type
Field Name
R/W
acp_hb0[7:0]
R/W
acp_hb1[7:0]
R/W
acp_hb2[7:0]
R/W
acp_pb0[7:0]
R/W
acp_pb1[7:0]
R/W
acp_pb2[7:0]
R/W
acp_pb3[7:0]
R/W
acp_pb4[7:0]
R/W
acp_pb5[7:0]
R/W
acp_pb6[7:0]
R/W
acp_pb7[7:0]
R/W
acp_pb8[7:0]
R/W
acp_pb9[7:0]
R/W
acp_pb10[7:0]
R/W
acp_pb11[7:0]
R/W
acp_pb12[7:0]
R/W
acp_pb13[7:0]
R/W
acp_pb14[7:0]
R/W
acp_pb15[7:0]
R/W
acp_pb16[7:0]
R/W
acp_pb17[7:0]
R/W
acp_pb18[7:0]
R/W
acp_pb19[7:0]
R/W
acp_pb20[7:0]
R/W
acp_pb21[7:0]
R/W
acp_pb22[7:0]
R/W
acp_pb23[7:0]
R/W
acp_pb24[7:0]
R/W
acp_pb25[7:0]
R/W
acp_pb26[7:0]
R/W
acp_pb27[7:0]
Default Value
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
isrc_pkt_en
to 1. When the transmission of an ISRC packet is
Table 68
and
Table 69
281
ADV8003 Hardware Manual
Byte Name
1
Header Byte 0
Header Byte 1
Header Byte 2
Data Byte 0
Data Byte 1
Data Byte 2
Data Byte 3
Data Byte 4
Data Byte 5
Data Byte 6
Data Byte 7
Data Byte 8
Data Byte 9
Data Byte 10
Data Byte 11
Data Byte 12
Data Byte 13
Data Byte 14
Data Byte 15
Data Byte 16
Data Byte 17
Data Byte 18
Data Byte 19
Data Byte 20
Data Byte 21
Data Byte 22
Data Byte 23
Data Byte 24
Data Byte 25
Data Byte 26
Data Byte 27
provide the list of registers that can be

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