Game Mode - Analog Devices ADV8003 Hardware Manual

Function
pvsp_rb_hsync_latency
[11:0]
0xXXX
pvsp_rb_max_latency[14:0], Primary VSP Map, Address 0xE8F2[7:0]; Address 0xE8F3[7:1] (Read Only)
This signal is used to record the maximum frame latency.
Function
pvsp_rb_max_latency[1
4:0]
0xXXX
pvsp_rb_min_latency[14:0], Primary VSP Map, Address 0xE8F4[7:0]; Address 0xE8F5[7:1] (Read Only)
This is signal is used to record the minimum frame latency.
Function
pvsp_rb_min_latency[1
4:0]
0xXXX

3.2.1.6. Game Mode

Frame latency should be as small as possible for gaming applications. PVSP supports a game mode, which has nearly zero frame latency
(latency less than 5 lines).
To enable the game mode of PVSP,
pvsp_bypass_ddr_mode, Primary VSP Map, Address 0xE84D[5]
This bit is used to enable game mode for the Primary VSP.
Function
pvsp_bypass_ddr_mod
e
0 
1
External memory is not used in game mode. Intra-field interpolation is used for interlaced input. Mosquito/block noise reduction and
sharpness are supported in game mode, both for interlaced input and progressive input.
In game mode, the following functions are not supported:
• Frame rate change
• Motion adaptive de-interlacing (autodisabled)
• Cadence detection (autodisabled)
• Random noise reduction (autodisabled)
• CUE correction (autodisabled)
• Crop
• Album mode
The functions listed as autodisabled do not need to be manually disabled in game mode – ADV8003 will automatically disable them when
game mode is enabled. Functions which are not listed as autodisabled must be manually disabled before game mode is enabled.
Rev. B, August 2013
Description
Number of HSync latency
Description
Maximum of frame latency
Description
Minimum of frame latency
pvsp_bypass_ddr_mode should be asserted.
Description
Normal mode
Game mode
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ADV8003 Hardware Manual