Figure 9. Adv8003Kbcz-8C And Adv8003Kbcz-7C Pin Configuration - Analog Devices ADV8003 Hardware Manual

1 2 3 4
OSD_ OSD_
AUD_
IN[23]/ CLK/
OSD_
A
EXT_ EXT_
DE IN[1]
DIN[7] CLK
OSD_ OSD_
OSD_
AUD_
IN[21]/ IN[22]/
B
EXT_ EXT_
VS
IN[0]
DIN[5] DIN[6]
OSD_ OSD_
AUD_
IN[19]/ IN[20]/
C
GND
EXT_ EXT_
IN[4]
DIN[3] DIN[4]
OSD_ OSD_ OSD_
IN[16]/ IN[17]/ IN[18]/
D
GND
EXT_ EXT_ EXT_
DIN[0] DIN[1] DIN[2]
OSD_ OSD_ OSD_
DVDD_
E IN[13]/ IN[14]/
IN[15]/
VBI_SCK VBI_MOSI
IO
VBI_CS
OSD_ OSD_ OSD_ OSD_
F
IN[9] IN[10] IN[11] IN[12]
OSD_ OSD_ OSD_ OSD_
G
IN[5] IN[6] IN[7] IN[8]
OSD_ OSD_ OSD_ OSD_
H
IN[1] IN[2] IN[3] IN[4]
OSD_ OSD_
J
DE HS
IN[0]
HS
DVDD_ DVDD_
K
VS PCLK
IO IO
L
P[32] P[33] P[34] P[35]
M
P[28] P[29] P[30] P[31]
N
P[24] P[25] P[26] P[27]
P
P[20] P[21] P[22] P[23]
R P[16] P[17] P[18] P[19]
T
P[14] P[15] GND GND
P[10] P[11] P[12] P[13]
U
V
P[6] P[7] P[8] P[9]
W
P[2] P[3] P[4] P[5]
DDR_
Y
P[0] P[1] GND
DQS[2]
DDR_
DDR_
AA
GND GND
DQ[18]
DQS[2]
DDR_ DDR_ DDR_ DDR_
AB
DQ[21] DQ[19] DQ[17] DM[2]
DDR_ DDR_ DDR_ DDR_
AC
DQ[16] DQ[20] DQ[22] DQ[25]
1 2 3 4
Rev. B, August 2013
5 6 7 8 9
AUD_ AUD_ ARC2_
MOSI1 SCK2
IN[2] IN[5] OUT
AUD_ ARC1_
SFL MISO1 MOSI2
IN[3] OUT
DSD_
SCLK SCL SCK1 GND
CLK
DVDD_
MCLK SDA CS1 GND
IO
GND GND GND
GND GND GND
DVDD GND GND
GND GND GND
DVDD GND GND
GND GND GND
GND GND GND
DVDD GND GND
GND GND GND
GND GND GND
GND GND DVDD
DDR_ DDR_ DDR_
DVDD_
GND
DQ[23] DQS[3] A[11]
DDR
DDR_
DDR_ DVDD_ NC/ DDR_
DQ[26] GND A[8]
DDR DQS[3]
DDR_ DDR_ DDR_ DDR_ DDR_
DQ[30] DM[3] DQ[31] DQ[29] A[12]
DDR_ DDR_ DDR_ DDR_ DDR_
DQ[28] DQ[27] DQ[24] A[9] A[5]
5 6 7 8 9

Figure 9. ADV8003KBCZ-8C and ADV8003KBCZ-7C Pin Configuration

10 11 12 13 14
CS2 RESET XTALN PVDD2
NC
MISO2 ALSB XTALP PVDD1
NC
INT0 PDN GND GND NC
DVDD_
INT1 INT2 TEST1
NC
IO
DVDD GND GND DVDD GND
GND GND GND GND GND
GND GND GND GND GND
GND GND GND GND GND
GND GND GND GND GND
GND GND GND GND GND
GND GND GND GND GND
GND GND GND GND GND
GND GND GND GND GND
GND GND GND GND GND
GND GND DVDD GND GND
DDR_
DDR_
DVDD_ DVDD_
GND
A[4]
DDR CAS DDR
DDR_
DVDD_ DDR_ DVDD_
GND
A[2]
DDR CS DDR
DDR_
DDR_ DDR_ DDR_ DDR_
A[6] A[3] A[0] BA[0]
RAS
DDR_ DDR_ DDR_ DDR_ DDR_
A[7] A[1] A[10] BA[1] BA[2]
10 11 12 13 14
45
15 16 17 18 19
CVDD1 RX_CN RX_0N RX_1N
NC
GND RX_CP RX_0P RX_1P
NC
RX_
NC AVDD1 GND GND AVDD1
HPD
RX_5V NC NC RTERM AVDD2
NC
GND GND GND
GND GND GND
DDC1_
GND GND DVDD
DDC1_
GND GND GND
GND GND GND
GND GND GND
GND GND GND
DDC2_
GND GND DVDD
DDC2_
GND GND GND
GND GND GND
DVDD GND GND
DDR_
DDR_ DDR_
DVDD_
GND
DQ[9] DQ[14]
CK DDR
DDR_ DDR_ DVDD_ DDR_
GND
DQ[11] DM[1]
CK DDR
DDR_ DDR_ DDR_ DDR_ DDR_
CKE DQ[12] DQS[1] DQ[8] DQ[13]
DDR_ DDR_
DDR_ DDR_ DDR_
DQ[10] DQ[15]
WE VREF DQS[1]
15 16 17 18 19
ADV8003 Hardware Manual
20 21 22 23
RX_2N CVDD1 A
NC NC
B
RX_2P GND
NC NC
C
AVDD1
NC NC
D
AVDD2
NC NC
E
TEST2 GND NC NC
NC PVDD3 GND CEC1
F
G
ELPF1 ELPF2 GND AVDD3
H
GND GND TX1_2+ TX1_2–
J
GND TX1_1+ TX1_1–
SDA
K
GND TX1_0+ TX1_0–
SCL
HPD_
L
GND TX1_C+ TX1_C–
TX1
HEAC_ HEAC_
M
R_TX1 PVDD5
1+ 1–
N
CEC2 PVDD5 PVDD5 AVDD3 AVDD3 NC
P
GND GND TX2_2+ TX2_2–
SCL
GND TX2_1+ TX2_1– R
SDA
HPD_
GND TX2_0+ TX2_0– T
TX2
R_TX2 GND TX2_C+ TX2_C–
U
HEAC_ HEAC_
V
GND PVDD6
2+ 2–
W
NC
TEST3 PVDD6 AVDD3
DDR_
PVDD_
Y
GND GND
DQ[6]
DDR
DDR_ DDR_
AA
GND GND
DM[0] DQ[3]
DDR_ DDR_ DDR_ DDR_
AB
DQ[0] DQ[5] DQS[0] DQ[4]
DDR_
DDR_ DDR_ DDR_
AC
DQ[7] DQ[2] DQ[1]
DQS[0]
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