Function
timer1_enable
0
1
Once the timer is enabled, disabling this bit will stop the counting, and it will be resumed when enabling back this bit.
Note that the rest of the bits within this register perform the same operation as for timer1 but for the other seven timers (i.e. bit[1]
controls timer2, bit[2] controls timer3, etc.); they are not included here for readability reasons.
timer1_reset, SPI Device Address 0x0B (TIMER), Address 0x04[0]
Timer 1 Reset
Function
timer1_reset
0
1
Enabling this reset will clear the timer_cnt and timer_irq_cnt registers.
Note that the rest of the bits within this register perform the same operation as for timer1 but for the other seven timers (that is, bit[1]
controls timer2, bit[2] controls timer3, and so on); they are not included here for readability reasons.
timer1_loop_mode, SPI Device Address 0x0B (TIMER), Address 0x05[0]
Timer 1 Mode Control
Function
timer1_loop_mode
0
1
When working in one time mode, after the interval is reached, the timer will stop by itself, that is, there is no need to set timer_enable to
disabled).
When working in infinite mode, timer_keep_result should be set to 0.
Note that the rest of the bits within this register perform the same operation as for timer1 but for the other seven timers (that is, bit[1]
controls timer2, bit[2] controls timer3, and so on); they are not included here for readability reasons.
timer1_keep_result, SPI Device Address 0x0B (TIMER), Address 0x06[0]
Timer 1 result control.
Function
timer1_keep_result
0
1
Note that the rest of the bits within this register perform the same operation as for timer1 but for the other seven timers (that is, bit[1]
controls timer2, bit[2] controls timer3, and so on); they are not included here for readability reasons.
Rev. B, August 2013
Description
Disables
Enables
Description
Not reset
Reset
Description
One time mode
Infinite mode
Description
Does not keep timer counter value after timer done
Keep timer counter value after timer done
214
ADV8003 Hardware Manual
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