lines/fields is reached. In rewind mode, this sync signal usually occurs after the total number of lines/fields is reached. Conventionally,
this means that the output video has corrupted field signals because one signal is generated by the incoming video and another is
generated when the internal line/field counters reach the end of a field.
When the VCR FF/RW sync control is enabled
and when the analog output matches the incoming VSync signal. This control is available in all slave timing modes except slave mode 0.
dvd_r, Encoder Map, Address 0xE482[5]
This bit is used to enable the SD VCR FF/RW sync feature.
Function
dvd_r
1
0
8.4.4.
Vertical Blanking Interval
The ADV8003 encoder core is able to accept input data that contains VBI data (such as CGMS, WSS, VITS) in SD, ED, and HD modes.
If VBI is disabled, VBI data is not present at the output and the entire VBI is blanked. These control bits are valid in all master and slave
timing modes. In order to enable this feature,
For the SMPTE 293M (525p) standard, VBI data can be inserted on Line 13 to Line 42 of each frame or on Line 6 to Line 43 for the ITU-R
BT.1358 (625p) standard. VBI data can be present on Line 10 to Line 20 for NTSC and on Line 7 to Line 22 for PAL. If CGMS is enabled
and VBI is disabled, the CGMS data is, nevertheless, available at the output.
8.4.5.
SD Subcarrier Frequency Control
The ADV8003 encoder core is able to generate the color subcarrier used in CVBS and S-Video (Y-C) outputs from the input pixel clock.
Four 8-bit registers are used to set up the subcarrier frequency. The value of these registers is calculated using
25.
where the sum is rounded to the nearest integer. For example, in NTSC mode:
where:
Subcarrier Register Value = 569408543d = 0×21F07C1F
SD F
Register 0: 0x1F
SC
SD F
Register 1: 0x7C
SC
SD F
Register 2: 0xF0
SC
SD F
Register 3: 0x21
SC
Rev. B, August 2013
(dvd_r
= 1), the line/field counters are updated according to the incoming VSync signal
Description
Enabled
Disabled
vbi_data_en
is set to 1.
Subcarrier
Frequency
Number
of
subcarrier
Number
of
27
MHz
Equation 24: SD Subcarrier Frequency Calculation
Subcarrier
Register
Value
Equation 25: SD Subcarrier Frequency Calculation
Register
=
periods
in
one
video
line
×
clk
cycles
in
one
video
line
227
5 .
=
×
=
569408543
2
32
1716
314
ADV8003 Hardware Manual
Equation 24
32
2
and
Equation
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