Figure 105: Simplified View Of Adv8003 Encoder Block - Analog Devices ADV8003 Hardware Manual

VIDEO FROM
INTERNAL
ADV8002
DATAPATH
VIDEO FROM
INTERNAL
ADV8002
DATAPATH
The video being routed to the SD and ED/HD encoders can be selected through the 0x0004[7:4] register (ED/HD encoder) and
0x0004[3:0] (SD encoder). Refer Section 2.2.1 for more information.
Once the desired video has been routed to the encoder, the mode of the incoming video data needs to be set using func_mode[2:0].
func_mode[2:0], Encoder Map, Address 0xE401[6:4]
This signal is used to select the input mode to the encoder.
Function
func_mode[2:0]
000 
001
010
011
100
101
110
111
Once the input configuration to the encoder section is configured, the input standard to the SD and/or HD encoder must be selected.
Table 76 lists the possible input standards supported by the ADV8003 encoder core. Note that if using the ADV8003 de-interlacer and/or
scaler, the input standard of the encoder must be set to that of the output of the VSP section. If bypassing the VSP section, the user should
set this to the standard of the external input video.
If configuring the HD encoder, the input standard must be set using hd_enc_ip_mode[4:0].
hd_enc_ip_mode[4:0], Encoder Map, Address 0xE430[7:3]
This signal is used to select the ED/HD output standard.
Rev. B, August 2013
ADV8003 ENCODER PROCESSOR
16/20/24-BIT
4:4:4 to 4:2:2
YCbCr 4:4:4
Conversion
24/30/36-BIT
YCbCr 4:4:4

Figure 105: Simplified View of ADV8003 Encoder Block

Description
SD input only
ED/HD-SDR input only
Reserved
Simultaneous SD and ED/HD-SDR
Reserved
Reserved
Reserved
Reserved
MUX
SD ENCODER
HD ENCODER
308
ADV8003 Hardware Manual
14-BIT
DAC 1
DAC 1
14-BIT
DAC 2
DAC 2
14-BIT
DAC 3
DAC 3
14-BIT
DAC 4
DAC 4
14-BIT
DAC 5
DAC 5
14-BIT
DAC 6
DAC 6