Analog Devices ADV8003 Hardware Manual page 123

Video signal processor with motion adaptive deinterlacing, scaling, bitmap osd, dual hdmi tx and video encoder
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Function
p2i_reset
0 
1
ddr2_intf_reset, IO Map, Address 0x1AFD[4] (Self-Clearing)
This bit is used to reset the external DDR memory interface core.
Function
ddr2_intf_reset
0 
1
spi_reset, IO Map, Address 0x1AFD[3] (Self-Clearing)
This bit is used to reset the SPI hardware, both master and slave.
Function
spi_reset
0 
1
sys_clk_reset, IO Map, Address 0x1AFD[2] (Self-Clearing)
This register bit resets the clock for the digital core.
Function
sys_clk_reset
0 
1
osd_reset, IO Map, Address 0x1AFD[1] (Self-Clearing)
This bit is used to reset the OSD core and the secondary input channel.
Function
osd_reset
0 
1
inp_sdr_reset, IO Map, Address 0x1AFD[0] (Self-Clearing)
This bit is used to reset the input capture and formatting logic for the primary input channel.
Function
inp_sdr_reset
0 
1
rx_reset, IO Map, Address 0x1AFE[7] (Self-Clearing)
This bit is used to reset the Serial Video Rx core and the RX input channel.
Rev. B, August 2013
Description
Default
Reset
Description
Default
Reset
Description
Default
Reset
Description
Default
Reset
Description
Default
Reset
Description
Default
Reset
123
ADV8003 Hardware Manual

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