Figure 84: Horizontal Timing Parameters; Figure 85: Vertical Parameters For Field 0 - Analog Devices ADV8003 Hardware Manual

Video signal processor with motion adaptive deinterlacing, scaling, bitmap osd, dual hdmi tx and video encoder
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Data
Enable
HSYNC
a
Total number of pixels per line
b
Active number of pixels per line
c
HSync front porch width in pixel unit
dvi_vsync_polarity, HDMI RX Map, Address 0xE205[4] (Read Only)
This bit is a readback to indicate the polarity of the VSync encoded in the input stream.
Function
dvi_vsync_polarity
0 
1
Data
Enable
HSYNC
VSYNC
Note: Field 1 measurements should not be used for progressive video modes.
Rev. B, August 2013
d
c
e

Figure 84: Horizontal Timing Parameters

Description
VSync active low
VSync active high
c
a
Total number of lines in field 0. Unit is in half lines.
b
Actives number of lines in field 0. Unit is in lines.
c
VSync front porch width in field 0. Unit is in half lines.
d
VSync pulse width in field 0. Unit is in half lines.
e
VSync back porch width in field 0. Unit is in half lines.

Figure 85: Vertical Parameters for Field 0

a
b
d
HSync width in pixel unit
e
HSync back porch width in pixel unit
a
d
e
234
ADV8003 Hardware Manual
b

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