Table of Contents
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APPENDIX F
PIXEL INPUT AND OUTPUT FORMATS
8-
10-
ADV8003
BIT
BIT
PIN NAME
SDR
SDR
4:2:2
4:2:2
59
OSD_IN.23
Z
Z
58
OSD_IN.22
Z
Z
57
OSD_IN.21
Z
Z
56
OSD_IN.20
Z
Z
55
OSD_IN.19
Z
Z
54
OSD_IN.18
Z
Z
53
OSD_IN.17
Z
Z
52
OSD_IN.16
Z
Z
51
OSD_IN.15
Z
Z
Sub
50
OSD_IN.14
Z
Z
TTL
49
OSD_IN.13
Z
Z
Input
48
OSD_IN.12
Z
Z
47
OSD_IN.11
Z
Z
46
OSD_IN.10
Z
Z
45
OSD_IN.9
Z
Z
44
OSD_IN.8
Z
Z
43
OSD_IN.7
Z
Z
42
OSD_IN.6
Z
Z
41
OSD_IN.5
Z
Z
40
OSD_IN.4
Z
Z
Rev. B, August 2013
12-
16-
20-
24-
24-
30-
BIT
BIT
BIT
BIT
BIT
BIT
SDR
SDR
SDR
SDR
SDR
SDR
4:2:2
4:2:2
4:2:2
4:2:2
4:4:4
4:4:4
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
416
Table 95: RGB Input Formats
36-
BIT
8-BIT DDR
10-BIT DDR
SDR
4:2:2
4:2:2
4:4:4
Clock
Clock
Clock
Clock
Rise
Fall
Rise
RGB Colourspace
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
24-
8-
BIT
BIT
12-BIT DDR
SDR
x2
4:2:2
4:4:4
SDR
SDR
(a)
4:4:4
4:2:2
Clock
Clock
Fall
Rise
Fall
Z
Z
Z
R7
Z
Z
Z
Z
R6
Z
Z
Z
Z
R5
Z
Z
Z
Z
R4
Z
Z
Z
Z
R3
Z
Z
Z
Z
R2
Z
Z
Z
Z
R1
Z
Z
Z
Z
R0
Z
Z
Z
Z
G7
Z
Z
Z
Z
G6
Z
Z
Z
Z
G5
Z
Z
Z
Z
G4
Z
Z
Z
Z
G3
G1.7
Z
Z
Z
G2
G1.6
Z
Z
Z
G1
G1.5
Z
Z
Z
G0
G1.4
Z
Z
Z
B7
G1.3
Z
Z
Z
B6
G1.2
Z
Z
Z
B5
G1.1
Z
Z
Z
B4
G1.0
ADV8003 Hardware Manual
8-
10-
12-
30-
21-
30-
BIT
BIT
BIT
BIT
BIT
BIT
x2
x2
x2
SDR
SDR
SDR
SDR
SDR
4:4:4
4:4:4
4:4:4
4:2:2
4:2:2
Z
Z
Z
Z
G6
R9
Z
Z
Z
Z
G5
R8
Z
Z
Z
Z
G4
R7
Z
Z
Z
Z
G3
R6
Z
Z
Z
Z
G2
R5
Z
Z
Z
Z
G1
R4
Z
Z
Z
Z
G0
R3
Z
Z
Z
Z
Z
R2
Z
Z
Z
Z
R6
R1
Z
Z
Z
Z
R5
R0
Z
Z
Z
Z
R4
G9
Z
Z
Z
Z
R3
G8
Z
Z
Z
Z
R2
G7
Z
Z
Z
Z
R1
G6
Z
Z
Z
Z
R0
G5
Z
Z
Z
Z
Z
G4
Z
Z
Z
Z
B6
G3
Z
Z
Z
Z
B5
G2
Z
Z
Z
Z
B4
G1
Z
Z
Z
Z
B3
G0
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