Ed/Hd Test Pattern Generator; Figure 110: Ed/Hd Sinc Compensation Filter Enabled; Figure 111: Ed/Hd Sinc Compensation Filter Disabled - Analog Devices ADV8003 Hardware Manual

sinc_filt_df_en, Encoder Map, Address 0xE433[3]
This bit is used to disable the sinc compensation filter on DAC1, DAC2 and DAC3.
Function
sinc_filt_df_en
0
1 
8.4.8.

ED/HD Test Pattern Generator

ADV8003 is able to internally generate ED/HD black bar, uniform background color or hatch test patterns. It is not possible to output a
color bar test pattern while EH/HD video is being routed through the encoder. This test pattern can be enabled using
test pattern used can be determined using hdtv_flat_tp.
y_colour[7:0], cr_colour[7:0], and
whether it is the lines of the crosshatch pattern or the uniform field test pattern. They are not functional as color controls for external pixel
data input.
hdtv_tp_en, Encoder Map, Address 0xE431[2]
This bit is used to enable the ED/HD test pattern generator.
Rev. B, August 2013
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
0 5 10

Figure 110: ED/HD Sinc Compensation Filter Enabled

0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
0 5 10

Figure 111: ED/HD Sinc Compensation Filter Disabled

Description
Disabled
Enabled
cb_colour[7:0] are used to program the output color of the internal ED/HD test pattern generator,
15 20 25
FREQUENCY (MHz)
15 20 25
FREQUENCY (MHz)
319
ADV8003 Hardware Manual
30
30
hdtv_tp_en and the