Freezing Output Video; Progressive Cadence Detection; Figure 52: 2:3 Frame Rate Conversion - Analog Devices ADV8003 Hardware Manual

Video signal processor with motion adaptive deinterlacing, scaling, bitmap osd, dual hdmi tx and video encoder
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3.2.1.8. Freezing Output Video

It is possible to freeze the output video from the PVSP by disabling the VIM. This can be achieved by setting

3.2.1.9. Progressive Cadence Detection

The ADV8003 PVSP supports multiple different types of cadence detection. Progressive cadence detection is another feature supported by
ADV8003 when the input video is 60 Hz and the output video is 24 Hz. An example of progressive cadence detection would involve the
ADV8003 detecting a pull-down ratio of 3:2 for 60 Hz video and reconverting this to its original film content at 24 Hz. This would allow
the video to be output at 24 Hz and, therefore, be displayed at the highest image quality possible.
Conversions from slower to higher frame rates are achieved by repeating certain frames. Similarly, conversions from higher to lower frame
rates are achieved by dropping some frames. Care has to be taken with repeating and dropping frames so that the quality of the video is
not impacted. A simple example of frame rate conversion is outlined in
rate of 24 fps to 30 fps. These two frame rates have a ratio of 4:5; for every 4 frames of input video, there must be 5 frames of output video.
This example uses a cadence detection of 3:2 pull-down which means that for every second frame of video data, an extra field of video
information will be displayed.
Progressive cadence detection can be enabled by setting register
pcadence_enable, Primary VSP Map, Address 0xE84D[1]
This bit is used to enable progressive cadence detection.
Function
pcadence_enable
0
1 
Rev. B, August 2013
F1
F1
24fps
24fps
A
A
A
F1
F1
F2
F2
30fps
30fps
A
A
A
A
A
A
B
B
B
2
2
:
:

Figure 52: 2:3 Frame Rate Conversion

Description
Disable progressive cadence detection
Enable progressive cadence detection
Figure
52. This example involves converting the input video at a
F2
F2
F3
F3
B
B
B
C
C
C
F3
F3
F4
F4
C
C
C
D
D
D
B
B
B
B
B
B
C
C
C
3
3
2
2
:
:
pcadence_enable
to 1.
155
ADV8003 Hardware Manual
pvsp_enable_vim
F4
F4
D
D
D
F5
F5
D
D
D
D
D
D
3
3
to 0.

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