Edid Handling; Reading The Edid; Edid Definitions - Analog Devices ADV8003 Hardware Manual

Packet Map
Address
0xF284
0xF285
0xF286
0xF287
0xF288
0xF289
0xF28A
0xF28B
0xF28C
0xF28D
0xF28E
0xF28F
0xF290
0xF291
0xF292
0xF293
0xF294
0xF295
0xF296
0xF297
0xF298
0xF299
0xF29A
0xF29B
0xF29C
0xF29D
0xF29E
1 As defined in the latest CEA 861 specification

6.12. EDID HANDLING

6.12.1. Reading the EDID

The Tx core of the ADV8003 features an EDID/HDCP controller which can read the EDID content of the downstream sink through the
DDC lines, TXDDC_SCL and TXDDC_SDA. This EDID/HDCP controller begins buffering segment 0 of the downstream sink EDID
once the sink HPD is detected and the Tx core of the ADV8003 is powered up. The system can request additional segments by
programming the EDID segment pointer edid_segment[7:0].
has been completed, and the EDID content can be read from the EDID Map.
edid_segment[7:0], TX2 Main Map, Address 0xF4C4[7:0]
This register is used to set the segment of the EDID read from the downstream Rx.
Function
edid_segment[7:0]
xxxxxxxx

6.12.2. EDID Definitions

Extended EDID (E-EDID) supports up to 256 segments. A segment is a 256-byte segment of EDID data containing one or two 128-byte
EDID blocks. A typical HDMI sink will have only two EDID blocks and so will only use segment 0. The first EDID block is always a base
Rev. B, August 2013
Access Type Field Name
R/W isrc2_pb1[7:0]
R/W isrc2_pb2[7:0]
R/W isrc2_pb3[7:0]
R/W isrc2_pb4[7:0]
R/W isrc2_pb5[7:0]
R/W isrc2_pb6[7:0]
R/W isrc2_pb7[7:0]
R/W isrc2_pb8[7:0]
R/W isrc2_pb9[7:0]
R/W isrc2_pb10[7:0]
R/W isrc2_pb11[7:0]
R/W isrc2_pb12[7:0]
R/W isrc2_pb13[7:0]
R/W isrc2_pb14[7:0]
R/W isrc2_pb15[7:0]
R/W isrc2_pb16[7:0]
R/W isrc2_pb17[7:0]
R/W isrc2_pb18[7:0]
R/W isrc2_pb19[7:0]
R/W isrc2_pb20[7:0]
R/W isrc2_pb21[7:0]
R/W isrc2_pb22[7:0]
R/W isrc2_pb23[7:0]
R/W isrc2_pb24[7:0]
R/W isrc2_pb25[7:0]
R/W isrc2_pb26[7:0]
R/W isrc2_pb27[7:0]
Description
User programmed EDID segment value
Default Value
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
0b00000000
edid_ready_int (refer to Section 6.8) indicates that a 256-byte EDID read
283
ADV8003 Hardware Manual
Byte Name
1
Data Byte 1
Data Byte 2
Data Byte 3
Data Byte 4
Data Byte 5
Data Byte 6
Data Byte 7
Data Byte 8
Data Byte 9
Data Byte 10
Data Byte 11
Data Byte 12
Data Byte 13
Data Byte 14
Data Byte 15
Data Byte 16
Data Byte 17
Data Byte 18
Data Byte 19
Data Byte 20
Data Byte 21
Data Byte 22
Data Byte 23
Data Byte 24
Data Byte 25
Data Byte 26
Data Byte 27