Analog Devices ADV8003 Hardware Manual page 44

Pin
Mnemonic
No.
AB9 DDR_A[12]
AB10 DDR_A[6]
AB11 DDR_A[3]
AB12 DDR_A[0]
AB13 DDR_BA[0]
AB14 DDR_RAS
AB15 DDR_CKE
AB16 DDR_DQ[12]
AB17 DDR_DQS[1]
AB18 DDR_DQ[8]
AB19 DDR_DQ[13]
AB20 DDR_DQ[0]
AB21 DDR_DQ[5]
AB22 DDR_DQS[0]
AB23 DDR_DQ[4]
AC1 DDR_DQ[16]
AC2 DDR_DQ[20]
AC3 DDR_DQ[22]
AC4 DDR_DQ[25]
AC5 DDR_DQ[28]
AC6 DDR_DQ[27]
AC7 DDR_DQ[24]
AC8 DDR_A[9]
AC9 DDR_A[5]
AC10 DDR_A[7]
AC11 DDR_A[1]
AC12 DDR_A[10]
AC13 DDR_BA[1]
AC14 DDR_BA[2]
AC15 DDR_ WE
AC16 DDR_VREF
AC17 DDR_DQ[10]
AC18
DDR_DQS[1]
AC19 DDR_DQ[15]
AC20 DDR_DQ[7]
AC21 DDR_DQ[2]
AC22 DDR_DQS[0]
AC23 DDR_DQ[1]
1
Sensitive node. Careful layout is important. The associated circuitry should be kept as close as possible to the ADV8003.
Rev. B, August 2013
Type Description
DDR interface Address Line. Interface to external RAM address lines.
DDR interface Address Line. Interface to external RAM address lines.
DDR interface Address Line. Interface to external RAM address lines.
DDR interface Address Line. Interface to external RAM address lines.
DDR interface Bank Address Line. Indicates which data bank to write/read from.
DDR interface Row Address Strobe for DDR Memory.
DDR interface Clock Enable for External DDR Memory.
DDR interface Data Line. Interface to external RAM data lines.
DDR interface Data Strobe for DDR Data Bytes[15:8].
DDR interface Data Line. Interface to external RAM data lines.
DDR interface Data Line. Interface to external RAM data lines.
DDR interface Data Line. Interface to external RAM data lines.
DDR interface Data Line. Interface to external RAM data lines.
DDR interface Data Strobe for DDR Data Bytes[7:0].
DDR interface Data Line. Interface to external RAM data lines.
DDR interface Data Line. Interface to external RAM data lines.
DDR interface Data Line. Interface to external RAM data lines.
DDR interface Data Line. Interface to external RAM data lines.
DDR interface Data Line. Interface to external RAM data lines.
DDR interface Data Line. Interface to external RAM data lines.
DDR interface Data Line. Interface to external RAM data lines.
DDR interface Data Line. Interface to external RAM data lines.
DDR interface Address Line. Interface to external RAM address lines.
DDR interface Address Line. Interface to external RAM address lines.
DDR interface Address Line. Interface to external RAM address lines.
DDR interface Address Line. Interface to external RAM address lines.
DDR interface Address Line. Interface to external RAM address lines.
DDR interface Bank Address Line. Indicates which data bank to write/read from.
DDR interface Bank Address Line. Indicates which data bank to write/read from.
DDR interface Write Enable Signal for DDR RAM.
DDR interface Reference Voltage for DDR RAM.
1
DDR interface Data Line. Interface to external RAM data lines.
DDR interface Data Strobe for DDR Data Byte[15:8].
DDR interface Data Line. Interface to external RAM data lines.
DDR interface Data Line. Interface to external RAM data lines.
DDR interface Data Line. Interface to external RAM data lines.
DDR interface Data Strobe for DDR Data Byte[7:0].
DDR interface Data Line. Interface to external RAM data lines.
44
ADV8003 Hardware Manual