Analog Devices ADV8003 Hardware Manual page 215

timer1_irq_en, SPI Device Address 0x0B (TIMER), Address 0x07[0]
Timer 1 interrupt enable.
Function
timer1_irq_en
0 
1
Note that the rest of the bits within this register perform the same operation as for timer1 but for the other seven timers (that is, bit[1]
controls timer2, bit[2] controls timer3, and so on); they are not included here for readability reasons.
timer1_clr_irq, SPI Device Address 0x0B (TIMER), Address 0x08[0]
Clears the timer 1 interrupt after writing 1 to this bit. Note these are not self clearing bits, the user just needs to write 1 to this bit and it
will clear the timer_flag and timer_irq_cnt registers. Even if timer_clr_irq is already set at 1, it will not clear the timer interrupt and flag
until the user writes 1 to it.
Note that the rest of the bits within this register perform the same operation as for timer1 but for the other seven timers (i.e. bit[1]
controls timer2, bit[2] controls timer3, etc.); they are not included here for readability reasons.
timer1_flag, SPI Device Address 0x0B (TIMER), Address 0x09[0] (Read Only)
Timer 1 flag.
Function
timer1_flag
0 
1
Note that the rest of the bits within this register perform the same operation as for timer1 but for the other seven timers (that is, bit[1]
controls timer2, bit[2] controls timer3, and so on); they are not included here for readability reasons.
timer1_interval[31:0], SPI Device Address 0x0B (TIMER), Address 0x0A[7:0]; Address 0x0B[7:0]; Address 0x0C[7:0]; Address 0x0D[7:0]
Timer 1 interval, unit is ms.
timer2_interval[31:0], SPI Device Address 0x0B (TIMER), Address 0x0E[7:0]; Address 0x0F[7:0]; Address 0x10[7:0]; Address 0x11[7:0]
Timer 2 interval, unit is ms.
timer3_interval[31:0], SPI Device Address 0x0B (TIMER), Address 0x12[7:0]; Address 0x13[7:0]; Address 0x14[7:0]; Address 0x15[7:0]
Timer 3 interval, unit is ms.
timer4_interval[31:0], SPI Device Address 0x0B (TIMER), Address 0x16[7:0]; Address 0x17[7:0]; Address 0x18[7:0]; Address 0x19[7:0]
Timer 4 interval, unit is ms.
timer5_interval[31:0], SPI Device Address 0x0B (TIMER), Address 0x1A[7:0]; Address 0x1B[7:0]; Address 0x1C[7:0]; Address 0x1D[7:0]
Timer 5 interval, unit is ms.
Rev. B, August 2013
Description
Disable
Enable
Description
Timer 1 is running
Timer 1 is done
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ADV8003 Hardware Manual